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Commit 2253e0b9 authored by David Daney's avatar David Daney Committed by Ralf Baechle
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MIPS: OCTEON: Remove some code limiting NR_IRQS to 255 



Follow-on patches for OCTEON III will increase the number of irqs to
potentially more than 256.

Increase the width of the octeon_irq_ciu_to_irq to int to be able to
handle this case.  Remove the hacky code that verified that u8 would
not be overflowed.

Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12495/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7d52ab16

arch/mips/cavium-octeon/octeon-irq.c

+2 −25
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@ 
 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2004-2014 Cavium, Inc.

 * Copyright (C) 2004-2016 Cavium, Inc.

 */



#include <linux/of_address.h>
@@ -28,7 +28,7 @@ struct octeon_irq_ciu_domain_data { 
	int num_sum;  /* number of sum registers (2 or 3). */

};



static __read_mostly u8 octeon_irq_ciu_to_irq[8][64];

static __read_mostly int octeon_irq_ciu_to_irq[8][64];



struct octeon_ciu_chip_data {

	union {
@@ -1158,16 +1158,6 @@ static struct irq_chip *octeon_irq_ciu_chip; 
static struct irq_chip *octeon_irq_ciu_chip_edge;

static struct irq_chip *octeon_irq_gpio_chip;



static bool octeon_irq_virq_in_range(unsigned int virq)

{

	/* We cannot let it overflow the mapping array. */

	if (virq < (1ul << 8 * sizeof(octeon_irq_ciu_to_irq[0][0])))

		return true;



	WARN_ONCE(true, "virq out of range %u.\n", virq);

	return false;

}



static int octeon_irq_ciu_map(struct irq_domain *d,

			      unsigned int virq, irq_hw_number_t hw)

{
@@ -1176,13 +1166,6 @@ static int octeon_irq_ciu_map(struct irq_domain *d, 
	unsigned int bit = hw & 63;

	struct octeon_irq_ciu_domain_data *dd = d->host_data;



	if (!octeon_irq_virq_in_range(virq))

		return -EINVAL;



	/* Don't map irq if it is reserved for GPIO. */

	if (line == 0 && bit >= 16 && bit <32)

		return 0;



	if (line >= dd->num_sum || octeon_irq_ciu_to_irq[line][bit] != 0)

		return -EINVAL;
@@ -1215,9 +1198,6 @@ static int octeon_irq_gpio_map(struct irq_domain *d, 
	unsigned int line, bit;

	int r;



	if (!octeon_irq_virq_in_range(virq))

		return -EINVAL;



	line = (hw + gpiod->base_hwirq) >> 6;

	bit = (hw + gpiod->base_hwirq) & 63;

	if (line > ARRAY_SIZE(octeon_irq_ciu_to_irq) ||
@@ -1899,9 +1879,6 @@ static int octeon_irq_ciu2_map(struct irq_domain *d, 
	unsigned int line = hw >> 6;

	unsigned int bit = hw & 63;



	if (!octeon_irq_virq_in_range(virq))

		return -EINVAL;



	/*

	 * Don't map irq if it is reserved for GPIO.

	 * (Line 7 are the GPIO lines.)