Merge "ARM: dts: msm: Add 725MHz GPU clock support for SDM632"

};

#include "sdm632-coresight.dtsi"

/* GPU Overrides*/

&msm_gpu {

	qcom,ca-target-pwrlevel = <4>;

	qcom,initial-pwrlevel = <5>;

	/delete-node/qcom,gpu-pwrlevels;

	/* Power levels */

	qcom,gpu-pwrlevels {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "qcom,gpu-pwrlevels";

		/* TURBO LD0 */

		qcom,gpu-pwrlevel@0 {

			reg = <0>;

			qcom,gpu-freq = <725000000>;

			qcom,bus-freq = <10>;

			qcom,bus-min = <10>;

			qcom,bus-max = <10>;

		};

		/* TURBO */

		qcom,gpu-pwrlevel@1 {

			reg = <1>;

			qcom,gpu-freq = <650000000>;

			qcom,bus-freq = <10>;

			qcom,bus-min = <10>;

			qcom,bus-max = <10>;

		};

		/* NOM+ */

		qcom,gpu-pwrlevel@2 {

			reg = <2>;

			qcom,gpu-freq = <560000000>;

			qcom,bus-freq = <10>;

			qcom,bus-min = <8>;

			qcom,bus-max = <10>;

		};

		/* NOM */

		qcom,gpu-pwrlevel@3 {

			reg = <3>;

			qcom,gpu-freq = <510000000>;

			qcom,bus-freq = <9>;

			qcom,bus-min = <6>;

			qcom,bus-max = <10>;

		};

		/* SVS+ */

		qcom,gpu-pwrlevel@4 {

			reg = <4>;

			qcom,gpu-freq = <400000000>;

			qcom,bus-freq = <7>;

			qcom,bus-min = <5>;

			qcom,bus-max = <8>;

		};

		/* SVS */

		qcom,gpu-pwrlevel@5 {

			reg = <5>;

			qcom,gpu-freq = <320000000>;

			qcom,bus-freq = <4>;

			qcom,bus-min = <2>;

			qcom,bus-max = <6>;

		};

		/* Low SVS */

		qcom,gpu-pwrlevel@6 {

			reg = <6>;

			qcom,gpu-freq = <216000000>;

			qcom,bus-freq = <1>;

			qcom,bus-min = <1>;

			qcom,bus-max = <4>;

		};

		qcom,gpu-pwrlevel@7 {

			reg = <7>;

			qcom,gpu-freq = <133300000>;

			qcom,bus-freq = <1>;

			qcom,bus-min = <1>;

			qcom,bus-max = <4>;

		};

		/* XO */

		qcom,gpu-pwrlevel@8 {

			reg = <8>;

			qcom,gpu-freq = <19200000>;

			qcom,bus-freq = <0>;

			qcom,bus-min = <0>;

			qcom,bus-max = <0>;

		};

	};

};