Loading arch/arm64/boot/dts/qcom/msm8917.dtsi +47 −1 Original line number Diff line number Diff line Loading @@ -1735,7 +1735,9 @@ /* GPU overrides */ &msm_gpu { qcom,gpu-speed-bin = <0x6018 0x80000000 31>; qcom,gpu-speed-bin-vectors = <0x6018 0x80000000 31>, <0x0164 0x00000400 9>; /delete-node/qcom,gpu-pwrlevels; qcom,gpu-pwrlevel-bins { Loading Loading @@ -1867,5 +1869,49 @@ qcom,bus-max = <0>; }; }; qcom,gpu-pwrlevels-2 { #address-cells = <1>; #size-cells = <0>; qcom,speed-bin = <2>; qcom,initial-pwrlevel = <1>; /* NOM */ qcom,gpu-pwrlevel@0 { reg = <0>; qcom,gpu-freq = <465000000>; qcom,bus-freq = <7>; qcom,bus-min = <5>; qcom,bus-max = <7>; }; /* SVS+ */ qcom,gpu-pwrlevel@1 { reg = <1>; qcom,gpu-freq = <400000000>; qcom,bus-freq = <4>; qcom,bus-min = <3>; qcom,bus-max = <5>; }; /* SVS */ qcom,gpu-pwrlevel@2 { reg = <2>; qcom,gpu-freq = <270000000>; qcom,bus-freq = <3>; qcom,bus-min = <1>; qcom,bus-max = <3>; }; /* XO */ qcom,gpu-pwrlevel@3 { reg = <3>; qcom,gpu-freq = <19200000>; qcom,bus-freq = <0>; qcom,bus-min = <0>; qcom,bus-max = <0>; }; }; }; }; drivers/gpu/msm/adreno_a3xx.c +6 −0 Original line number Diff line number Diff line Loading @@ -156,6 +156,12 @@ static void a3xx_efuse_speed_bin(struct adreno_device *adreno_dev) unsigned int speed_bin[3]; struct kgsl_device *device = &adreno_dev->dev; if (of_get_property(device->pdev->dev.of_node, "qcom,gpu-speed-bin-vectors", NULL)) { adreno_efuse_speed_bin_array(adreno_dev); return; } if (of_property_read_u32_array(device->pdev->dev.of_node, "qcom,gpu-speed-bin", speed_bin, 3)) return; Loading Loading
arch/arm64/boot/dts/qcom/msm8917.dtsi +47 −1 Original line number Diff line number Diff line Loading @@ -1735,7 +1735,9 @@ /* GPU overrides */ &msm_gpu { qcom,gpu-speed-bin = <0x6018 0x80000000 31>; qcom,gpu-speed-bin-vectors = <0x6018 0x80000000 31>, <0x0164 0x00000400 9>; /delete-node/qcom,gpu-pwrlevels; qcom,gpu-pwrlevel-bins { Loading Loading @@ -1867,5 +1869,49 @@ qcom,bus-max = <0>; }; }; qcom,gpu-pwrlevels-2 { #address-cells = <1>; #size-cells = <0>; qcom,speed-bin = <2>; qcom,initial-pwrlevel = <1>; /* NOM */ qcom,gpu-pwrlevel@0 { reg = <0>; qcom,gpu-freq = <465000000>; qcom,bus-freq = <7>; qcom,bus-min = <5>; qcom,bus-max = <7>; }; /* SVS+ */ qcom,gpu-pwrlevel@1 { reg = <1>; qcom,gpu-freq = <400000000>; qcom,bus-freq = <4>; qcom,bus-min = <3>; qcom,bus-max = <5>; }; /* SVS */ qcom,gpu-pwrlevel@2 { reg = <2>; qcom,gpu-freq = <270000000>; qcom,bus-freq = <3>; qcom,bus-min = <1>; qcom,bus-max = <3>; }; /* XO */ qcom,gpu-pwrlevel@3 { reg = <3>; qcom,gpu-freq = <19200000>; qcom,bus-freq = <0>; qcom,bus-min = <0>; qcom,bus-max = <0>; }; }; }; };
drivers/gpu/msm/adreno_a3xx.c +6 −0 Original line number Diff line number Diff line Loading @@ -156,6 +156,12 @@ static void a3xx_efuse_speed_bin(struct adreno_device *adreno_dev) unsigned int speed_bin[3]; struct kgsl_device *device = &adreno_dev->dev; if (of_get_property(device->pdev->dev.of_node, "qcom,gpu-speed-bin-vectors", NULL)) { adreno_efuse_speed_bin_array(adreno_dev); return; } if (of_property_read_u32_array(device->pdev->dev.of_node, "qcom,gpu-speed-bin", speed_bin, 3)) return; Loading