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Commit 207b504a authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-soc-4.3' of... 

Merge tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

The i.MX SoC changes for 4.3:
 - Add i.MX6 Ultralite SoC support, which is the newest addition to
   i.MX6 family.  It integrates a single Cortex-A7 core and a power
   management module that reduces the complexity of external power
   supply and simplifies power sequencing.
 - Change SNVS RTC driver to use syscon interface for register access,
   and add SNVS power key driver support.
 - Add a second clock for mxc rtc driver, and support device tree probe
   for the driver.
 - Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
   platform.

* tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

:
  rtc: snvs: select option REGMAP_MMIO
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  input: snvs_pwrkey: use "wakeup-source" as deivce tree property name
  Document: devicetree: input: imx: i.mx snvs power device tree bindings
  input: keyboard: imx: add snvs power key driver
  Document: dt: fsl: snvs: change support syscon
  rtc: snvs: use syscon to access register
  ARM: imx: add low-level debug support for i.mx6ul
  ARM: imx: add i.mx6ul msl support

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents f9511a4f 8a0fa184

Documentation/devicetree/bindings/crypto/fsl-sec4.txt

+78 −13
Original line number Diff line number Diff line
@@ -288,12 +288,13 @@ Secure Non-Volatile Storage (SNVS) Node 
    Node defines address range and the associated

    interrupt for the SNVS function.  This function

    monitors security state information & reports

    security violations.

    security violations. This also included rtc,

    system power off and ON/OFF key.



  - compatible

      Usage: required

      Value type: <string>

      Definition: Must include "fsl,sec-v4.0-mon".

      Definition: Must include "fsl,sec-v4.0-mon" and "syscon".



  - reg

      Usage: required
@@ -324,7 +325,7 @@ Secure Non-Volatile Storage (SNVS) Node 
           the child address, parent address, & length.



   - interrupts

      Usage: required

      Usage: optional

      Value type: <prop_encoded-array>

      Definition:  Specifies the interrupts generated by this

           device.  The value of the interrupts property
@@ -341,7 +342,7 @@ Secure Non-Volatile Storage (SNVS) Node 


EXAMPLE

	sec_mon@314000 {

		compatible = "fsl,sec-v4.0-mon";

		compatible = "fsl,sec-v4.0-mon", "syscon";

		reg = <0x314000 0x1000>;

		ranges = <0 0x314000 0x1000>;

		interrupt-parent = <&mpic>;
@@ -358,16 +359,72 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node 
      Value type: <string>

      Definition: Must include "fsl,sec-v4.0-mon-rtc-lp".



  - reg

  - interrupts

      Usage: required

      Value type: <prop-encoded-array>

      Definition: A standard property.  Specifies the physical

          address and length of the SNVS LP configuration registers.

      Value type: <prop_encoded-array>

      Definition: Specifies the interrupts generated by this

	   device.  The value of the interrupts property

	   consists of one interrupt specifier. The format

	   of the specifier is defined by the binding document

	   describing the node's interrupt parent.



 - regmap

	Usage: required

	Value type: <phandle>

	Definition: this is phandle to the register map node.



 - offset

	Usage: option

	value type: <u32>

	Definition: LP register offset. default it is 0x34.



EXAMPLE

	sec_mon_rtc_lp@314000 {

	sec_mon_rtc_lp@1 {

		compatible = "fsl,sec-v4.0-mon-rtc-lp";

		reg = <0x34 0x58>;

		interrupts = <93 2>;

		regmap = <&snvs>;

		offset = <0x34>;

	};



=====================================================================

System ON/OFF key driver



  The snvs-pwrkey is designed to enable POWER key function which controlled

  by SNVS ONOFF, the driver can report the status of POWER key and wakeup

  system if pressed after system suspend.



  - compatible:

      Usage: required

      Value type: <string>

      Definition: Mush include "fsl,sec-v4.0-pwrkey".



  - interrupts:

      Usage: required

      Value type: <prop_encoded-array>

      Definition: The SNVS ON/OFF interrupt number to the CPU(s).



  - linux,keycode:

      Usage: option

      Value type: <int>

      Definition: Keycode to emit, KEY_POWER by default.



  - wakeup-source:

      Usage: option

      Value type: <boo>

      Definition: Button can wake-up the system.



 - regmap:

      Usage: required:

      Value type: <phandle>

      Definition: this is phandle to the register map node.



EXAMPLE:

	snvs-pwrkey@0x020cc000 {

		compatible = "fsl,sec-v4.0-pwrkey";

		regmap = <&snvs>;

		interrupts = <0 4 0x4>

	        linux,keycode = <116>; /* KEY_POWER */

		wakeup;

	};



=====================================================================
@@ -443,12 +500,20 @@ FULL EXAMPLE 
		compatible = "fsl,sec-v4.0-mon";

		reg = <0x314000 0x1000>;

		ranges = <0 0x314000 0x1000>;

		interrupt-parent = <&mpic>;

		interrupts = <93 2>;



		sec_mon_rtc_lp@34 {

			compatible = "fsl,sec-v4.0-mon-rtc-lp";

			reg = <0x34 0x58>;

			regmap = <&sec_mon>;

			offset = <0x34>;

			interrupts = <93 2>;

		};



		snvs-pwrkey@0x020cc000 {

			compatible = "fsl,sec-v4.0-pwrkey";

			regmap = <&sec_mon>;

			interrupts = <0 4 0x4>;

			linux,keycode = <116>; /* KEY_POWER */

			wakeup;

		};

	};

Documentation/devicetree/bindings/input/snvs-pwrkey.txt

0 → 100644
+1 −0
Original line number Diff line number Diff line 
See Documentation/devicetree/bindings/crypto/fsl-sec4.txt

Documentation/devicetree/bindings/rtc/rtc-mxc.txt

0 → 100644
+26 −0
Original line number Diff line number Diff line 
* Real Time Clock of the i.MX SoCs



RTC controller for the i.MX SoCs



Required properties:

- compatible: Should be "fsl,imx1-rtc" or "fsl,imx21-rtc".

- reg: physical base address of the controller and length of memory mapped

  region.

- interrupts: IRQ line for the RTC.

- clocks: should contain two entries:

  * one for the input reference

  * one for the the SoC RTC

- clock-names: should contain:

  * "ref" for the input reference clock

  * "ipg" for the SoC RTC clock



Example:



rtc@10007000 {

	compatible = "fsl,imx21-rtc";

	reg = <0x10007000 0x1000>;

	interrupts = <22>;

	clocks = <&clks IMX27_CLK_CKIL>,

		 <&clks IMX27_CLK_RTC_IPG_GATE>;

	clock-names = "ref", "ipg";

};

arch/arm/Kconfig.debug

+9 −0
Original line number Diff line number Diff line
@@ -417,6 +417,13 @@ choice 
		  Say Y here if you want kernel low-level debugging support

		  on i.MX6SX.



	config DEBUG_IMX6UL_UART

		bool "i.MX6UL Debug UART"

		depends on SOC_IMX6UL

		help

		  Say Y here if you want kernel low-level debugging support

		  on i.MX6UL.



	config DEBUG_IMX7D_UART

		bool "i.MX7D Debug UART"

		depends on SOC_IMX7D
@@ -1275,6 +1282,7 @@ config DEBUG_IMX_UART_PORT 
						DEBUG_IMX6Q_UART || \

						DEBUG_IMX6SL_UART || \

						DEBUG_IMX6SX_UART || \

						DEBUG_IMX6UL_UART || \

						DEBUG_IMX7D_UART

	default 1

	depends on ARCH_MXC
@@ -1326,6 +1334,7 @@ config DEBUG_LL_INCLUDE 
				 DEBUG_IMX6Q_UART || \

				 DEBUG_IMX6SL_UART || \

				 DEBUG_IMX6SX_UART || \

				 DEBUG_IMX6UL_UART || \

				 DEBUG_IMX7D_UART

	default "debug/ks8695.S" if DEBUG_KS8695_UART

	default "debug/msm.S" if DEBUG_QCOM_UARTDM

arch/arm/include/debug/imx-uart.h

+13 −0
Original line number Diff line number Diff line
@@ -90,6 +90,17 @@ 
#define IMX6SX_UART_BASE_ADDR(n) IMX6SX_UART##n##_BASE_ADDR

#define IMX6SX_UART_BASE(n)	IMX6SX_UART_BASE_ADDR(n)



#define IMX6UL_UART1_BASE_ADDR	0x02020000

#define IMX6UL_UART2_BASE_ADDR	0x021e8000

#define IMX6UL_UART3_BASE_ADDR	0x021ec000

#define IMX6UL_UART4_BASE_ADDR	0x021f0000

#define IMX6UL_UART5_BASE_ADDR	0x021f4000

#define IMX6UL_UART6_BASE_ADDR	0x021fc000

#define IMX6UL_UART7_BASE_ADDR	0x02018000

#define IMX6UL_UART8_BASE_ADDR	0x02024000

#define IMX6UL_UART_BASE_ADDR(n) IMX6UL_UART##n##_BASE_ADDR

#define IMX6UL_UART_BASE(n)	IMX6UL_UART_BASE_ADDR(n)



#define IMX7D_UART1_BASE_ADDR	0x30860000

#define IMX7D_UART2_BASE_ADDR	0x30890000

#define IMX7D_UART3_BASE_ADDR	0x30880000
@@ -124,6 +135,8 @@ 
#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6SL)

#elif defined(CONFIG_DEBUG_IMX6SX_UART)

#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6SX)

#elif defined(CONFIG_DEBUG_IMX6UL_UART)

#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX6UL)

#elif defined(CONFIG_DEBUG_IMX7D_UART)

#define UART_PADDR	IMX_DEBUG_UART_BASE(IMX7D)