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Commit 20624d17 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "Final drm fixes: one core locking imbalance regression, and a bunch of
  i915 baytrail s/r fixes"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm: fix drm_mode_getconnector() locking imbalance regression
  drm/i915/vlv: remove wait for previous GFX clk disable request
  drm/i915/chv: Remove Wait for a previous gfx force-off
  drm/i915/vlv: save/restore the power context base reg
parents 9a08da1c f4274e23

drivers/gpu/drm/drm_crtc.c

+3 −1
Original line number Diff line number Diff line
@@ -2121,7 +2121,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data, 
	connector = drm_connector_find(dev, out_resp->connector_id);

	if (!connector) {

		ret = -ENOENT;

		goto out;

		goto out_unlock;

	}



	for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++)
@@ -2201,6 +2201,8 @@ int drm_mode_getconnector(struct drm_device *dev, void *data, 


out:

	drm_modeset_unlock(&dev->mode_config.connection_mutex);



out_unlock:

	mutex_unlock(&dev->mode_config.mutex);



	return ret;

drivers/gpu/drm/i915/i915_drv.c

+2 −12
Original line number Diff line number Diff line
@@ -1095,6 +1095,7 @@ static void vlv_save_gunit_s0ix_state(struct drm_i915_private *dev_priv) 
	/* Gunit-Display CZ domain, 0x182028-0x1821CF */

	s->gu_ctl0		= I915_READ(VLV_GU_CTL0);

	s->gu_ctl1		= I915_READ(VLV_GU_CTL1);

	s->pcbr			= I915_READ(VLV_PCBR);

	s->clock_gate_dis2	= I915_READ(VLV_GUNIT_CLOCK_GATE2);



	/*
@@ -1189,6 +1190,7 @@ static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *dev_priv) 
	/* Gunit-Display CZ domain, 0x182028-0x1821CF */

	I915_WRITE(VLV_GU_CTL0,			s->gu_ctl0);

	I915_WRITE(VLV_GU_CTL1,			s->gu_ctl1);

	I915_WRITE(VLV_PCBR,			s->pcbr);

	I915_WRITE(VLV_GUNIT_CLOCK_GATE2,	s->clock_gate_dis2);

}
@@ -1197,19 +1199,7 @@ int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool force_on) 
	u32 val;

	int err;



	val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);

	WARN_ON(!!(val & VLV_GFX_CLK_FORCE_ON_BIT) == force_on);



#define COND (I915_READ(VLV_GTLC_SURVIVABILITY_REG) & VLV_GFX_CLK_STATUS_BIT)

	/* Wait for a previous force-off to settle */

	if (force_on) {

		err = wait_for(!COND, 20);

		if (err) {

			DRM_ERROR("timeout waiting for GFX clock force-off (%08x)\n",

				  I915_READ(VLV_GTLC_SURVIVABILITY_REG));

			return err;

		}

	}



	val = I915_READ(VLV_GTLC_SURVIVABILITY_REG);

	val &= ~VLV_GFX_CLK_FORCE_ON_BIT;

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -1094,6 +1094,7 @@ struct vlv_s0ix_state { 
	/* Display 2 CZ domain */

	u32 gu_ctl0;

	u32 gu_ctl1;

	u32 pcbr;

	u32 clock_gate_dis2;

};