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Commit 20211e4d authored by Paolo Ciarrocchi's avatar Paolo Ciarrocchi Committed by Ingo Molnar
Browse files

x86: Coding style fixes to arch/x86/oprofile/op_model_p4.c 



A coding style patch to arch/x86/oprofile/op_model_p4.c that
removes 87 errors and 4 warnings.

Before:
total: 89 errors, 13 warnings, 722 lines checked

After:
total: 2 errors, 9 warnings, 721 lines checked

Compile tested, binary verified as follow:

paolo@paolo-desktop:~/linux.trees.git$ size /tmp/op_model_p4.o.*
   text    data     bss     dec     hex filename
   2691     968      32    3691     e6b /tmp/op_model_p4.o.after
   2691     968      32    3691     e6b /tmp/op_model_p4.o.before

paolo@paolo-desktop:~/linux.trees.git$ md5sum /tmp/op_model_p4.o.*
8c1c9823bab33333e1f7f76574e62561  /tmp/op_model_p4.o.after
8c1c9823bab33333e1f7f76574e62561  /tmp/op_model_p4.o.before

Signed-off-by: default avatarPaolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Cc: robert.richter@amd.com
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent a7f5aaf3

arch/x86/oprofile/op_model_p4.c

+87 −88
Original line number Diff line number Diff line
@@ -10,11 +10,12 @@ 


#include <linux/oprofile.h>

#include <linux/smp.h>

#include <linux/ptrace.h>

#include <linux/nmi.h>

#include <asm/msr.h>

#include <asm/ptrace.h>

#include <asm/fixmap.h>

#include <asm/apic.h>

#include <asm/nmi.h>





#include "op_x86_model.h"

#include "op_counter.h"
@@ -97,7 +98,7 @@ static struct p4_counter_binding p4_counters [NUM_COUNTERS_NON_HT] = { 
	{ CTR_IQ_5,    MSR_P4_IQ_PERFCTR5,    MSR_P4_IQ_CCCR5 }

};



#define NUM_UNUSED_CCCRS	NUM_CCCRS_NON_HT - NUM_COUNTERS_NON_HT

#define NUM_UNUSED_CCCRS (NUM_CCCRS_NON_HT - NUM_COUNTERS_NON_HT)



/* p4 event codes in libop/op_event.h are indices into this table. */
@@ -402,12 +403,10 @@ static void p4_fill_in_addresses(struct op_msrs * const msrs) 
	stag = get_stagger();



	/* initialize some registers */

	for (i = 0; i < num_counters; ++i) {

	for (i = 0; i < num_counters; ++i)

		msrs->counters[i].addr = 0;

	}

	for (i = 0; i < num_controls; ++i) {

	for (i = 0; i < num_controls; ++i)

		msrs->controls[i].addr = 0;

	}



	/* the counter & cccr registers we pay attention to */

	for (i = 0; i < num_counters; ++i) {
@@ -534,11 +533,10 @@ static void pmc_setup_one_p4_counter(unsigned int ctr) 
			CCCR_CLEAR(cccr);

			CCCR_SET_REQUIRED_BITS(cccr);

			CCCR_SET_ESCR_SELECT(cccr, ev->escr_select);

			if (stag == 0) {

			if (stag == 0)

				CCCR_SET_PMI_OVF_0(cccr);

			} else {

			else

				CCCR_SET_PMI_OVF_1(cccr);

			}

			CCCR_WRITE(cccr, high, VIRT_CTR(stag, ctr));

			return;

		}
@@ -686,7 +684,8 @@ static void p4_shutdown(struct op_msrs const * const msrs) 
		if (CTR_IS_RESERVED(msrs, i))

			release_perfctr_nmi(msrs->counters[i].addr);

	}

	/* some of the control registers are specially reserved in

	/*

	 * some of the control registers are specially reserved in

	 * conjunction with the counter registers (hence the starting offset).

	 * This saves a few bits.

	 */