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Commit 1eccc6e1 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio 

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for kernel cycle v4.7:

  Core infrastructural changes:

   - Support for natively single-ended GPIO driver stages.

     This means that if the hardware has registers to configure open
     drain or open source configuration, we use that rather than (as we
     did before) try to emulate it by switching the line to an input to
     get high impedance.

     This is also documented throughly in Documentation/gpio/driver.txt
     for those of you who did not understand one word of what I just
     wrote.

   - Start to do away with the unnecessarily complex and unitelligible
     ARCH_REQUIRE_GPIOLIB and ARCH_WANT_OPTIONAL_GPIOLIB, another
     evolutional artifact from the time when the GPIO subsystem was
     unmaintained.

     Archs can now just select GPIOLIB and be done with it, cleanups to
     arches will trickle in for the next kernel.  Some minor archs ACKed
     the changes immediately so these are included in this pull request.

   - Advancing the use of the data pointer inside the GPIO device for
     storing driver data by switching the PowerPC, Super-H Unicore and
     a few other subarches or subsystem drivers in ALSA SoC, Input,
     serial, SSB, staging etc to use it.

   - The initialization now reads the input/output state of the GPIO
     lines, so that each GPIO descriptor knows - if this callback is
     implemented - whether the line is input or output.  This also
     reflects nicely in userspace "lsgpio".

   - It is now possible to name GPIO producer names, line names, from
     the device tree.  (Platform data has been supported for a while).
     I bet we will get a similar mechanism for ACPI one of those days.
     This makes is possible to get sensible producer names for e.g.
     GPIO rails in "lsgpio" in userspace.

  New drivers:

   - New driver for the Loongson1.

   - The XLP driver now supports Broadcom Vulcan ARM64.

   - The IT87 driver now supports IT8620 and IT8628.

   - The PCA953X driver now supports Galileo Gen2.

  Driver improvements:

   - MCP23S08 was switched to use the gpiolib irqchip helpers and now
     also suppors level-triggered interrupts.

   - 74x164 and RCAR now supports the .set_multiple() callback

   - AMDPT was converted to use generic GPIO.

   - TC3589x, TPS65218, SX150X, F7188X, MENZ127, VX855, WM831X, WM8994
     support the new single ended callback for open drain and in some
     cases open source.

   - Implement the .get_direction() callback for a few more drivers like
     PL061, Xgene.

  Cleanups:

   - Paul Gortmaker combed through the drivers and de-modularized those
     who are not really modules.

   - Move the GPIO poweroff DT bindings to the power subdir where they
     belong.

   - Rename gpio-generic.c to gpio-mmio.c, which is much more to the
     point.  That's what it is handling, nothing more, nothing less"

* tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (126 commits)
  MIPS: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
  gpio: zevio: make it explicitly non-modular
  gpio: timberdale: make it explicitly non-modular
  gpio: stmpe: make it explicitly non-modular
  gpio: sodaville: make it explicitly non-modular
  pinctrl: sh-pfc: Let gpio_chip.to_irq() return zero on error
  gpio: dwapb: Add ACPI device ID for DWAPB GPIO controller on X-Gene platforms
  gpio: dt-bindings: add wd,mbl-gpio bindings
  gpio: of: make it possible to name GPIO lines
  gpio: make gpiod_to_irq() return negative for NO_IRQ
  gpio: xgene: implement .get_direction()
  gpio: xgene: Enable ACPI support for X-Gene GFC GPIO driver
  gpio: tegra: Implement gpio_get_direction callback
  gpio: set up initial state from .get_direction()
  gpio: rename gpio-generic.c into gpio-mmio.c
  gpio: generic: fix GPIO_GENERIC_PLATFORM is set to module case
  gpio: dwapb: add gpio-signaled acpi event support
  gpio: dwapb: convert device node to fwnode
  gpio: dwapb: remove name from dwapb_port_property
  gpio/qoriq: select IRQ_DOMAIN
  ...
parents dcc4c2f6 d30a2b47

Documentation/devicetree/bindings/gpio/gpio-74x164.txt

+3 −1
Original line number Diff line number Diff line 
* Generic 8-bits shift register GPIO driver



Required properties:

- compatible : Should be "fairchild,74hc595"

- compatible: Should contain one of the following:

    "fairchild,74hc595"

    "nxp,74lvc594"

- reg : chip select number

- gpio-controller : Marks the device node as a gpio controller.

- #gpio-cells : Should be two.  The first cell is the pin number and

Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt

+17 −3
Original line number Diff line number Diff line 
* Freescale MPC512x/MPC8xxx/Layerscape GPIO controller

* Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller



Required properties:

- compatible : Should be "fsl,<soc>-gpio"

  The following <soc>s are known to be supported:

    mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq.

	mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,

	ls1021a, ls1043a, ls2080a.

- reg : Address and length of the register set for the device

- interrupts : Should be the port interrupt shared by all 32 pins.

- #gpio-cells : Should be two.  The first cell is the pin number and
@@ -15,7 +16,7 @@ Optional properties: 
- little-endian : GPIO registers are used as little endian. If not

                  present registers are used as big endian by default.



Example:

Example of gpio-controller node for a mpc5125 SoC:



gpio0: gpio@1100 {

	compatible = "fsl,mpc5125-gpio";
@@ -24,3 +25,16 @@ gpio0: gpio@1100 { 
	interrupts = <78 0x8>;

	status = "okay";

};



Example of gpio-controller node for a ls2080a SoC:



gpio0: gpio@2300000 {

	compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";

	reg = <0x0 0x2300000 0x0 0x10000>;

	interrupts = <0 36 0x4>; /* Level high type */

	gpio-controller;

	little-endian;

	#gpio-cells = <2>;

	interrupt-controller;

	#interrupt-cells = <2>;

};

Documentation/devicetree/bindings/gpio/gpio-xlp.txt

+3 −0
Original line number Diff line number Diff line
@@ -3,6 +3,8 @@ Netlogic XLP Family GPIO 


This GPIO driver is used for following Netlogic XLP SoCs:

	XLP832, XLP316, XLP208, XLP980, XLP532

This GPIO driver is also compatible with GPIO controller found on

Broadcom Vulcan ARM64.



Required properties:

-------------------
@@ -13,6 +15,7 @@ Required properties: 
  - "netlogic,xlp208-gpio": For Netlogic XLP208

  - "netlogic,xlp980-gpio": For Netlogic XLP980

  - "netlogic,xlp532-gpio": For Netlogic XLP532

  - "brcm,vulcan-gpio": For Broadcom Vulcan ARM64

- reg: Physical base address and length of the controller's registers.

- #gpio-cells: Should be two. The first cell is the pin number and the second

  cell is used to specify optional parameters (currently unused).

Documentation/devicetree/bindings/gpio/gpio.txt

+26 −0
Original line number Diff line number Diff line
@@ -131,6 +131,13 @@ Every GPIO controller node must contain both an empty "gpio-controller" 
property, and a #gpio-cells integer property, which indicates the number of

cells in a gpio-specifier.



Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an

instance of a hardware IP core on a silicon die, usually exposed to the

programmer as a coherent range of I/O addresses. Usually each such bank is

exposed in the device tree as an individual gpio-controller node, reflecting

the fact that the hardware was synthesized by reusing the same IP block a

few times over.



Optionally, a GPIO controller may have a "ngpios" property. This property

indicates the number of in-use slots of available slots for GPIOs. The

typical example is something like this: the hardware register is 32 bits
@@ -145,6 +152,21 @@ additional bitmask is needed to specify which GPIOs are actually in use, 
and which are dummies. The bindings for this case has not yet been

specified, but should be specified if/when such hardware appears.



Optionally, a GPIO controller may have a "gpio-line-names" property. This is

an array of strings defining the names of the GPIO lines going out of the

GPIO controller. This name should be the most meaningful producer name

for the system, such as a rail name indicating the usage. Package names

such as pin name are discouraged: such lines have opaque names (since they

are by definition generic purpose) and such names are usually not very

helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are

reasonable line names as they describe what the line is used for. "GPIO0"

is not a good name to give to a GPIO line. Placeholders are discouraged:

rather use the "" (blank string) if the use of the GPIO line is undefined

in your design. The names are assigned starting from line offset 0 from

left to right from the passed array. An incomplete array (where the number

of passed named are less than ngpios) will still be used up until the last

provided valid line index.



Example:



gpio-controller@00000000 {
@@ -153,6 +175,10 @@ gpio-controller@00000000 { 
	gpio-controller;

	#gpio-cells = <2>;

	ngpios = <18>;

	gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R",

		"LED G", "LED B", "Col A", "Col B", "Col C", "Col D",

		"Row A", "Row B", "Row C", "Row D", "NMI button",

		"poweroff", "reset";

}



The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism

Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt

0 → 100644
+38 −0
Original line number Diff line number Diff line 
Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.



The Western Digital MyBook Live has two memory-mapped GPIO controllers.

Both GPIO controller only have a single 8-bit data register, where GPIO

state can be read and/or written.



Required properties:

	- compatible: should be "wd,mbl-gpio"

	- reg-names: must contain

		"dat" - data register

	- reg: address + size pairs describing the GPIO register sets;

		order must correspond with the order of entries in reg-names

	- #gpio-cells: must be set to 2. The first cell is the pin number and

			the second cell is used to specify the gpio polarity:

			0 = active high

			1 = active low

	- gpio-controller: Marks the device node as a gpio controller.



Optional properties:

	- no-output: GPIOs are read-only.



Examples:

	gpio0: gpio0@e0000000 {

		compatible = "wd,mbl-gpio";

		reg-names = "dat";

		reg = <0xe0000000 0x1>;

		#gpio-cells = <2>;

		gpio-controller;

	};



	gpio1: gpio1@e0100000 {

		compatible = "wd,mbl-gpio";

		reg-names = "dat";

		reg = <0xe0100000 0x1>;

		#gpio-cells = <2>;

		gpio-controller;

		no-output;

	};