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Commit 1dfd166e authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (110 commits)
  sh: i2c-sh7760: Replase from ctrl_* to __raw_*
  sh: clkfwk: Shuffle around to match the intc split up.
  sh: clkfwk: modify for_each_frequency end condition
  sh: fix clk_get() error handling
  sh: clkfwk: Fix fault in frequency iterator.
  sh: clkfwk: Add a helper for rate rounding by divisor ranges.
  sh: clkfwk: Abstract rate rounding helper.
  sh: clkfwk: support clock remapping.
  sh: pci: Convert to upper/lower_32_bits() helpers.
  sh: mach-sdk7786: Add support for the FPGA SRAM.
  sh: Provide a generic SRAM pool for tiny memories.
  sh: pci: Support secondary FPGA-driven PCIe clocks on SDK7786.
  sh: pci: Support slot 4 routing on SDK7786.
  sh: Fix up PMB locking.
  sh: mach-sdk7786: Add support for fpga gpios.
  sh: use pr_fmt for clock framework, too.
  sh: remove name and id from struct clk
  sh: free-without-alloc fix for sh_mobile_lcdcfb
  sh: perf: Set up perf_max_events.
  sh: perf: Support SH-X3 hardware counters.
  ...

Fix up trivial conflicts (perf_max_events got removed) in arch/sh/kernel/perf_event.c
parents 8e775167 8df39901
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+4 −2
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ config SUPERH
	select HAVE_KERNEL_LZMA
	select HAVE_KERNEL_LZO
	select HAVE_SYSCALL_TRACEPOINTS
	select HAVE_REGS_AND_STACK_ACCESS_API
	select RTC_LIB
	select GENERIC_ATOMIC64
	help
@@ -46,7 +47,7 @@ config SUPERH32
	select HAVE_ARCH_KGDB
	select HAVE_HW_BREAKPOINT
	select HAVE_MIXED_BREAKPOINTS_REGS
	select PERF_EVENTS if HAVE_HW_BREAKPOINT
	select PERF_EVENTS
	select ARCH_HIBERNATION_POSSIBLE if MMU

config SUPERH64
@@ -471,6 +472,7 @@ config CPU_SUBTYPE_SHX3
	select CPU_SH4A
	select CPU_SHX3
	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
	select ARCH_REQUIRE_GPIOLIB

# SH4AL-DSP Processor Support

@@ -575,7 +577,7 @@ config SH_CLK_CPG
config SH_CLK_CPG_LEGACY
	depends on SH_CLK_CPG
	def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
		      !CPU_SUBTYPE_SH7786
		      !CPU_SHX3 && !CPU_SUBTYPE_SH7757

config SH_CLK_MD
	int "CPU Mode Pin Setting"
+18 −0
Original line number Diff line number Diff line
@@ -155,6 +155,8 @@ config SH_SDK7786
	depends on CPU_SUBTYPE_SH7786
	select SYS_SUPPORTS_PCI
	select NO_IOPORT if !PCI
	select ARCH_WANT_OPTIONAL_GPIOLIB
	select HAVE_SRAM_POOL
	help
	  Select SDK7786 if configuring for a Renesas Technology Europe
	  SH7786-65nm board.
@@ -165,6 +167,11 @@ config SH_HIGHLANDER
	select SYS_SUPPORTS_PCI
	select IO_TRAPPED if MMU

config SH_SH7757LCR
	bool "SH7757LCR"
	depends on CPU_SUBTYPE_SH7757
	select ARCH_REQUIRE_GPIOLIB

config SH_SH7785LCR
	bool "SH7785LCR"
	depends on CPU_SUBTYPE_SH7785
@@ -309,6 +316,17 @@ config SH_POLARIS
	help
	  Select if configuring for an SMSC Polaris development board

config SH_SH2007
	bool "SH-2007 board"
	select NO_IOPORT
	depends on CPU_SUBTYPE_SH7780
	help
	  SH-2007 is a single-board computer based around SH7780 chip
	  intended for embedded applications.
	  It has an Ethernet interface (SMC9118), direct connected
	  Compact Flash socket, two serial ports and PC-104 bus.
	  More information at <http://sh2000.sh-linux.org>.

endmenu

source "arch/sh/boards/mach-r2d/Kconfig"
+2 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@
# Specific board support, not covered by a mach group.
#
obj-$(CONFIG_SH_MAGIC_PANEL_R2)	+= board-magicpanelr2.o
obj-$(CONFIG_SH_SH2007)		+= board-sh2007.o
obj-$(CONFIG_SH_SH7785LCR)	+= board-sh7785lcr.o
obj-$(CONFIG_SH_URQUELL)	+= board-urquell.o
obj-$(CONFIG_SH_SHMIN)		+= board-shmin.o
@@ -9,3 +10,4 @@ obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
obj-$(CONFIG_SH_ESPT)		+= board-espt.o
obj-$(CONFIG_SH_POLARIS)	+= board-polaris.o
obj-$(CONFIG_SH_TITAN)		+= board-titan.o
obj-$(CONFIG_SH_SH7757LCR)	+= board-sh7757lcr.o
+133 −0
Original line number Diff line number Diff line
/*
 * SH-2007 board support.
 *
 * Copyright (C) 2003, 2004  SUGIOKA Toshinobu
 * Copyright (C) 2010  Hitoshi Mitake <mitake@dcl.info.waseda.ac.jp>
 */
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/smsc911x.h>
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/io.h>
#include <asm/machvec.h>
#include <mach/sh2007.h>

struct smsc911x_platform_config smc911x_info = {
	.flags		= SMSC911X_USE_32BIT,
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
};

static struct resource smsc9118_0_resources[] = {
	[0] = {
		.start	= SMC0_BASE,
		.end	= SMC0_BASE + 0xff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= evt2irq(0x240),
		.end	= evt2irq(0x240),
		.flags	= IORESOURCE_IRQ,
	}
};

static struct resource smsc9118_1_resources[] = {
	[0] = {
		.start	= SMC1_BASE,
		.end	= SMC1_BASE + 0xff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= evt2irq(0x280),
		.end	= evt2irq(0x280),
		.flags	= IORESOURCE_IRQ,
	}
};

static struct platform_device smsc9118_0_device = {
	.name		= "smsc911x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smsc9118_0_resources),
	.resource	= smsc9118_0_resources,
	.dev = {
		.platform_data = &smc911x_info,
	},
};

static struct platform_device smsc9118_1_device = {
	.name		= "smsc911x",
	.id		= 1,
	.num_resources	= ARRAY_SIZE(smsc9118_1_resources),
	.resource	= smsc9118_1_resources,
	.dev = {
		.platform_data = &smc911x_info,
	},
};

static struct resource cf_resources[] = {
	[0] = {
		.start	= CF_BASE + CF_OFFSET,
		.end	= CF_BASE + CF_OFFSET + 0x0f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= CF_BASE + CF_OFFSET + 0x206,
		.end	= CF_BASE + CF_OFFSET + 0x20f,
		.flags	= IORESOURCE_MEM,
	},
	[2] = {
		.start	= evt2irq(0x2c0),
		.end	= evt2irq(0x2c0),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device cf_device  = {
	.name		= "pata_platform",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(cf_resources),
	.resource	= cf_resources,
};

static struct platform_device *sh2007_devices[] __initdata = {
	&smsc9118_0_device,
	&smsc9118_1_device,
	&cf_device,
};

static int __init sh2007_io_init(void)
{
	platform_add_devices(sh2007_devices, ARRAY_SIZE(sh2007_devices));
	return 0;
}
subsys_initcall(sh2007_io_init);

static void __init sh2007_init_irq(void)
{
	plat_irq_setup_pins(IRQ_MODE_IRQ);
}

/*
 * Initialize the board
 */
static void __init sh2007_setup(char **cmdline_p)
{
	printk(KERN_INFO "SH-2007 Setup...");

	/* setup wait control registers for area 5 */
	__raw_writel(CS5BCR_D, CS5BCR);
	__raw_writel(CS5WCR_D, CS5WCR);
	__raw_writel(CS5PCR_D, CS5PCR);

	printk(KERN_INFO " done.\n");
}

/*
 * The Machine Vector
 */
struct sh_machine_vector mv_sh2007 __initmv = {
	.mv_setup		= sh2007_setup,
	.mv_name		= "sh2007",
	.mv_init_irq		= sh2007_init_irq,
};
+374 −0
Original line number Diff line number Diff line
/*
 * Renesas R0P7757LC0012RL Support.
 *
 * Copyright (C) 2009 - 2010  Renesas Solutions Corp.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/io.h>
#include <cpu/sh7757.h>
#include <asm/sh_eth.h>
#include <asm/heartbeat.h>

static struct resource heartbeat_resource = {
	.start	= 0xffec005c,	/* PUDR */
	.end	= 0xffec005c,
	.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
};

static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };

static struct heartbeat_data heartbeat_data = {
	.bit_pos	= heartbeat_bit_pos,
	.nr_bits	= ARRAY_SIZE(heartbeat_bit_pos),
	.flags		= HEARTBEAT_INVERTED,
};

static struct platform_device heartbeat_device = {
	.name		= "heartbeat",
	.id		= -1,
	.dev	= {
		.platform_data	= &heartbeat_data,
	},
	.num_resources	= 1,
	.resource	= &heartbeat_resource,
};

/* Fast Ethernet */
static struct resource sh_eth0_resources[] = {
	{
		.start  = 0xfef00000,
		.end    = 0xfef001ff,
		.flags  = IORESOURCE_MEM,
	}, {
		.start  = 84,
		.end    = 84,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct sh_eth_plat_data sh7757_eth0_pdata = {
	.phy = 1,
	.edmac_endian = EDMAC_LITTLE_ENDIAN,
};

static struct platform_device sh7757_eth0_device = {
	.name		= "sh-eth",
	.resource	= sh_eth0_resources,
	.id		= 0,
	.num_resources	= ARRAY_SIZE(sh_eth0_resources),
	.dev		= {
		.platform_data = &sh7757_eth0_pdata,
	},
};

static struct resource sh_eth1_resources[] = {
	{
		.start  = 0xfef00800,
		.end    = 0xfef009ff,
		.flags  = IORESOURCE_MEM,
	}, {
		.start  = 84,
		.end    = 84,
		.flags  = IORESOURCE_IRQ,
	},
};

static struct sh_eth_plat_data sh7757_eth1_pdata = {
	.phy = 1,
	.edmac_endian = EDMAC_LITTLE_ENDIAN,
};

static struct platform_device sh7757_eth1_device = {
	.name		= "sh-eth",
	.resource	= sh_eth1_resources,
	.id		= 1,
	.num_resources	= ARRAY_SIZE(sh_eth1_resources),
	.dev		= {
		.platform_data = &sh7757_eth1_pdata,
	},
};

static struct platform_device *sh7757lcr_devices[] __initdata = {
	&heartbeat_device,
	&sh7757_eth0_device,
	&sh7757_eth1_device,
};

static int __init sh7757lcr_devices_setup(void)
{
	/* RGMII (PTA) */
	gpio_request(GPIO_FN_ET0_MDC, NULL);
	gpio_request(GPIO_FN_ET0_MDIO, NULL);
	gpio_request(GPIO_FN_ET1_MDC, NULL);
	gpio_request(GPIO_FN_ET1_MDIO, NULL);

	/* ONFI (PTB, PTZ) */
	gpio_request(GPIO_FN_ON_NRE, NULL);
	gpio_request(GPIO_FN_ON_NWE, NULL);
	gpio_request(GPIO_FN_ON_NWP, NULL);
	gpio_request(GPIO_FN_ON_NCE0, NULL);
	gpio_request(GPIO_FN_ON_R_B0, NULL);
	gpio_request(GPIO_FN_ON_ALE, NULL);
	gpio_request(GPIO_FN_ON_CLE, NULL);

	gpio_request(GPIO_FN_ON_DQ7, NULL);
	gpio_request(GPIO_FN_ON_DQ6, NULL);
	gpio_request(GPIO_FN_ON_DQ5, NULL);
	gpio_request(GPIO_FN_ON_DQ4, NULL);
	gpio_request(GPIO_FN_ON_DQ3, NULL);
	gpio_request(GPIO_FN_ON_DQ2, NULL);
	gpio_request(GPIO_FN_ON_DQ1, NULL);
	gpio_request(GPIO_FN_ON_DQ0, NULL);

	/* IRQ8 to 0 (PTB, PTC) */
	gpio_request(GPIO_FN_IRQ8, NULL);
	gpio_request(GPIO_FN_IRQ7, NULL);
	gpio_request(GPIO_FN_IRQ6, NULL);
	gpio_request(GPIO_FN_IRQ5, NULL);
	gpio_request(GPIO_FN_IRQ4, NULL);
	gpio_request(GPIO_FN_IRQ3, NULL);
	gpio_request(GPIO_FN_IRQ2, NULL);
	gpio_request(GPIO_FN_IRQ1, NULL);
	gpio_request(GPIO_FN_IRQ0, NULL);

	/* SPI0 (PTD) */
	gpio_request(GPIO_FN_SP0_MOSI, NULL);
	gpio_request(GPIO_FN_SP0_MISO, NULL);
	gpio_request(GPIO_FN_SP0_SCK, NULL);
	gpio_request(GPIO_FN_SP0_SCK_FB, NULL);
	gpio_request(GPIO_FN_SP0_SS0, NULL);
	gpio_request(GPIO_FN_SP0_SS1, NULL);
	gpio_request(GPIO_FN_SP0_SS2, NULL);
	gpio_request(GPIO_FN_SP0_SS3, NULL);

	/* RMII 0/1 (PTE, PTF) */
	gpio_request(GPIO_FN_RMII0_CRS_DV, NULL);
	gpio_request(GPIO_FN_RMII0_TXD1, NULL);
	gpio_request(GPIO_FN_RMII0_TXD0, NULL);
	gpio_request(GPIO_FN_RMII0_TXEN, NULL);
	gpio_request(GPIO_FN_RMII0_REFCLK, NULL);
	gpio_request(GPIO_FN_RMII0_RXD1, NULL);
	gpio_request(GPIO_FN_RMII0_RXD0, NULL);
	gpio_request(GPIO_FN_RMII0_RX_ER, NULL);
	gpio_request(GPIO_FN_RMII1_CRS_DV, NULL);
	gpio_request(GPIO_FN_RMII1_TXD1, NULL);
	gpio_request(GPIO_FN_RMII1_TXD0, NULL);
	gpio_request(GPIO_FN_RMII1_TXEN, NULL);
	gpio_request(GPIO_FN_RMII1_REFCLK, NULL);
	gpio_request(GPIO_FN_RMII1_RXD1, NULL);
	gpio_request(GPIO_FN_RMII1_RXD0, NULL);
	gpio_request(GPIO_FN_RMII1_RX_ER, NULL);

	/* eMMC (PTG) */
	gpio_request(GPIO_FN_MMCCLK, NULL);
	gpio_request(GPIO_FN_MMCCMD, NULL);
	gpio_request(GPIO_FN_MMCDAT7, NULL);
	gpio_request(GPIO_FN_MMCDAT6, NULL);
	gpio_request(GPIO_FN_MMCDAT5, NULL);
	gpio_request(GPIO_FN_MMCDAT4, NULL);
	gpio_request(GPIO_FN_MMCDAT3, NULL);
	gpio_request(GPIO_FN_MMCDAT2, NULL);
	gpio_request(GPIO_FN_MMCDAT1, NULL);
	gpio_request(GPIO_FN_MMCDAT0, NULL);

	/* LPC (PTG, PTH, PTQ, PTU) */
	gpio_request(GPIO_FN_SERIRQ, NULL);
	gpio_request(GPIO_FN_LPCPD, NULL);
	gpio_request(GPIO_FN_LDRQ, NULL);
	gpio_request(GPIO_FN_WP, NULL);
	gpio_request(GPIO_FN_FMS0, NULL);
	gpio_request(GPIO_FN_LAD3, NULL);
	gpio_request(GPIO_FN_LAD2, NULL);
	gpio_request(GPIO_FN_LAD1, NULL);
	gpio_request(GPIO_FN_LAD0, NULL);
	gpio_request(GPIO_FN_LFRAME, NULL);
	gpio_request(GPIO_FN_LRESET, NULL);
	gpio_request(GPIO_FN_LCLK, NULL);
	gpio_request(GPIO_FN_LGPIO7, NULL);
	gpio_request(GPIO_FN_LGPIO6, NULL);
	gpio_request(GPIO_FN_LGPIO5, NULL);
	gpio_request(GPIO_FN_LGPIO4, NULL);

	/* SPI1 (PTH) */
	gpio_request(GPIO_FN_SP1_MOSI, NULL);
	gpio_request(GPIO_FN_SP1_MISO, NULL);
	gpio_request(GPIO_FN_SP1_SCK, NULL);
	gpio_request(GPIO_FN_SP1_SCK_FB, NULL);
	gpio_request(GPIO_FN_SP1_SS0, NULL);
	gpio_request(GPIO_FN_SP1_SS1, NULL);

	/* SDHI (PTI) */
	gpio_request(GPIO_FN_SD_WP, NULL);
	gpio_request(GPIO_FN_SD_CD, NULL);
	gpio_request(GPIO_FN_SD_CLK, NULL);
	gpio_request(GPIO_FN_SD_CMD, NULL);
	gpio_request(GPIO_FN_SD_D3, NULL);
	gpio_request(GPIO_FN_SD_D2, NULL);
	gpio_request(GPIO_FN_SD_D1, NULL);
	gpio_request(GPIO_FN_SD_D0, NULL);

	/* SCIF3/4 (PTJ, PTW) */
	gpio_request(GPIO_FN_RTS3, NULL);
	gpio_request(GPIO_FN_CTS3, NULL);
	gpio_request(GPIO_FN_TXD3, NULL);
	gpio_request(GPIO_FN_RXD3, NULL);
	gpio_request(GPIO_FN_RTS4, NULL);
	gpio_request(GPIO_FN_RXD4, NULL);
	gpio_request(GPIO_FN_TXD4, NULL);
	gpio_request(GPIO_FN_CTS4, NULL);

	/* SERMUX (PTK, PTL, PTO, PTV) */
	gpio_request(GPIO_FN_COM2_TXD, NULL);
	gpio_request(GPIO_FN_COM2_RXD, NULL);
	gpio_request(GPIO_FN_COM2_RTS, NULL);
	gpio_request(GPIO_FN_COM2_CTS, NULL);
	gpio_request(GPIO_FN_COM2_DTR, NULL);
	gpio_request(GPIO_FN_COM2_DSR, NULL);
	gpio_request(GPIO_FN_COM2_DCD, NULL);
	gpio_request(GPIO_FN_COM2_RI, NULL);
	gpio_request(GPIO_FN_RAC_RXD, NULL);
	gpio_request(GPIO_FN_RAC_RTS, NULL);
	gpio_request(GPIO_FN_RAC_CTS, NULL);
	gpio_request(GPIO_FN_RAC_DTR, NULL);
	gpio_request(GPIO_FN_RAC_DSR, NULL);
	gpio_request(GPIO_FN_RAC_DCD, NULL);
	gpio_request(GPIO_FN_RAC_TXD, NULL);
	gpio_request(GPIO_FN_COM1_TXD, NULL);
	gpio_request(GPIO_FN_COM1_RXD, NULL);
	gpio_request(GPIO_FN_COM1_RTS, NULL);
	gpio_request(GPIO_FN_COM1_CTS, NULL);

	writeb(0x10, 0xfe470000);	/* SMR0: SerMux mode 0 */

	/* IIC (PTM, PTR, PTS) */
	gpio_request(GPIO_FN_SDA7, NULL);
	gpio_request(GPIO_FN_SCL7, NULL);
	gpio_request(GPIO_FN_SDA6, NULL);
	gpio_request(GPIO_FN_SCL6, NULL);
	gpio_request(GPIO_FN_SDA5, NULL);
	gpio_request(GPIO_FN_SCL5, NULL);
	gpio_request(GPIO_FN_SDA4, NULL);
	gpio_request(GPIO_FN_SCL4, NULL);
	gpio_request(GPIO_FN_SDA3, NULL);
	gpio_request(GPIO_FN_SCL3, NULL);
	gpio_request(GPIO_FN_SDA2, NULL);
	gpio_request(GPIO_FN_SCL2, NULL);
	gpio_request(GPIO_FN_SDA1, NULL);
	gpio_request(GPIO_FN_SCL1, NULL);
	gpio_request(GPIO_FN_SDA0, NULL);
	gpio_request(GPIO_FN_SCL0, NULL);

	/* USB (PTN) */
	gpio_request(GPIO_FN_VBUS_EN, NULL);
	gpio_request(GPIO_FN_VBUS_OC, NULL);

	/* SGPIO1/0 (PTN, PTO) */
	gpio_request(GPIO_FN_SGPIO1_CLK, NULL);
	gpio_request(GPIO_FN_SGPIO1_LOAD, NULL);
	gpio_request(GPIO_FN_SGPIO1_DI, NULL);
	gpio_request(GPIO_FN_SGPIO1_DO, NULL);
	gpio_request(GPIO_FN_SGPIO0_CLK, NULL);
	gpio_request(GPIO_FN_SGPIO0_LOAD, NULL);
	gpio_request(GPIO_FN_SGPIO0_DI, NULL);
	gpio_request(GPIO_FN_SGPIO0_DO, NULL);

	/* WDT (PTN) */
	gpio_request(GPIO_FN_SUB_CLKIN, NULL);

	/* System (PTT) */
	gpio_request(GPIO_FN_STATUS1, NULL);
	gpio_request(GPIO_FN_STATUS0, NULL);

	/* PWMX (PTT) */
	gpio_request(GPIO_FN_PWMX1, NULL);
	gpio_request(GPIO_FN_PWMX0, NULL);

	/* R-SPI (PTV) */
	gpio_request(GPIO_FN_R_SPI_MOSI, NULL);
	gpio_request(GPIO_FN_R_SPI_MISO, NULL);
	gpio_request(GPIO_FN_R_SPI_RSPCK, NULL);
	gpio_request(GPIO_FN_R_SPI_SSL0, NULL);
	gpio_request(GPIO_FN_R_SPI_SSL1, NULL);

	/* EVC (PTV, PTW) */
	gpio_request(GPIO_FN_EVENT7, NULL);
	gpio_request(GPIO_FN_EVENT6, NULL);
	gpio_request(GPIO_FN_EVENT5, NULL);
	gpio_request(GPIO_FN_EVENT4, NULL);
	gpio_request(GPIO_FN_EVENT3, NULL);
	gpio_request(GPIO_FN_EVENT2, NULL);
	gpio_request(GPIO_FN_EVENT1, NULL);
	gpio_request(GPIO_FN_EVENT0, NULL);

	/* LED for heartbeat */
	gpio_request(GPIO_PTU3, NULL);
	gpio_direction_output(GPIO_PTU3, 1);
	gpio_request(GPIO_PTU2, NULL);
	gpio_direction_output(GPIO_PTU2, 1);
	gpio_request(GPIO_PTU1, NULL);
	gpio_direction_output(GPIO_PTU1, 1);
	gpio_request(GPIO_PTU0, NULL);
	gpio_direction_output(GPIO_PTU0, 1);

	/* control for MDIO of Gigabit Ethernet */
	gpio_request(GPIO_PTT4, NULL);
	gpio_direction_output(GPIO_PTT4, 1);

	/* control for eMMC */
	gpio_request(GPIO_PTT7, NULL);		/* eMMC_RST# */
	gpio_direction_output(GPIO_PTT7, 0);
	gpio_request(GPIO_PTT6, NULL);		/* eMMC_INDEX# */
	gpio_direction_output(GPIO_PTT6, 0);
	gpio_request(GPIO_PTT5, NULL);		/* eMMC_PRST# */
	gpio_direction_output(GPIO_PTT5, 1);

	/* General platform */
	return platform_add_devices(sh7757lcr_devices,
				    ARRAY_SIZE(sh7757lcr_devices));
}
arch_initcall(sh7757lcr_devices_setup);

/* Initialize IRQ setting */
void __init init_sh7757lcr_IRQ(void)
{
	plat_irq_setup_pins(IRQ_MODE_IRQ7654);
	plat_irq_setup_pins(IRQ_MODE_IRQ3210);
}

/* Initialize the board */
static void __init sh7757lcr_setup(char **cmdline_p)
{
	printk(KERN_INFO "Renesas R0P7757LC0012RL support.\n");
}

static int sh7757lcr_mode_pins(void)
{
	int value = 0;

	/* These are the factory default settings of S3 (Low active).
	 * If you change these dip switches then you will need to
	 * adjust the values below as well.
	 */
	value |= MODE_PIN0;	/* Clock Mode: 1 */

	return value;
}

/* The Machine Vector */
static struct sh_machine_vector mv_sh7757lcr __initmv = {
	.mv_name		= "SH7757LCR",
	.mv_setup		= sh7757lcr_setup,
	.mv_init_irq		= init_sh7757lcr_IRQ,
	.mv_mode_pins		= sh7757lcr_mode_pins,
};
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