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Commit 1d3bb996 authored by David Gibson's avatar David Gibson Committed by David S. Miller
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Device tree aware EMAC driver 



Based on BenH's earlier work, this is a new version of the EMAC driver
for the built-in ethernet found on PowerPC 4xx embedded CPUs.  The
same ASIC is also found in the Axon bridge chip.  This new version is
designed to work in the arch/powerpc tree, using the device tree to
probe the device, rather than the old and ugly arch/ppc OCP layer.

This driver is designed to sit alongside the old driver (that lies in
drivers/net/ibm_emac and this one in drivers/net/ibm_newemac).  The
old driver is left in place to support arch/ppc until arch/ppc itself
reaches its final demise (not too long now, with luck).

This driver still has a number of things that could do with cleaning
up, but I think they can be fixed up after merging.  Specifically:
	- Should be adjusted to properly use the dma mapping API.
Axon needs this.
	- Probe logic needs reworking, in conjuction with the general
probing code for of_platform devices.  The dependencies here between
EMAC, MAL, ZMII etc. make this complicated.  At present, it usually
works, because we initialize and register the sub-drivers before the
EMAC driver itself, and (being in driver code) runs after the devices
themselves have been instantiated from the device tree.

Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 03233b90

Documentation/powerpc/booting-without-of.txt

+156 −0
Original line number Diff line number Diff line
@@ -1824,6 +1824,162 @@ platforms are moved over to use the flattened-device-tree model. 
		fsl,has-rstcr;

	};





    h) 4xx/Axon EMAC ethernet nodes



    The EMAC ethernet controller in IBM and AMCC 4xx chips, and also

    the Axon bridge.  To operate this needs to interact with a ths

    special McMAL DMA controller, and sometimes an RGMII or ZMII

    interface.  In addition to the nodes and properties described

    below, the node for the OPB bus on which the EMAC sits must have a

    correct clock-frequency property.



      i) The EMAC node itself



    Required properties:

    - device_type       : "network"



    - compatible        : compatible list, contains 2 entries, first is

			  "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,

			  405gp, Axon) and second is either "ibm,emac" or

			  "ibm,emac4".  For Axon, thus, we have: "ibm,emac-axon",

			  "ibm,emac4"

    - interrupts        : <interrupt mapping for EMAC IRQ and WOL IRQ>

    - interrupt-parent  : optional, if needed for interrupt mapping

    - reg               : <registers mapping>

    - local-mac-address : 6 bytes, MAC address

    - mal-device        : phandle of the associated McMAL node

    - mal-tx-channel    : 1 cell, index of the tx channel on McMAL associated

			  with this EMAC

    - mal-rx-channel    : 1 cell, index of the rx channel on McMAL associated

			  with this EMAC

    - cell-index        : 1 cell, hardware index of the EMAC cell on a given

			  ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on

			  each Axon chip)

    - max-frame-size    : 1 cell, maximum frame size supported in bytes

    - rx-fifo-size      : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec

			  operations.

			  For Axon, 2048

    - tx-fifo-size      : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec

			  operations.

			  For Axon, 2048.

    - fifo-entry-size   : 1 cell, size of a fifo entry (used to calculate

			  thresholds).

			  For Axon, 0x00000010

    - mal-burst-size    : 1 cell, MAL burst size (used to calculate thresholds)

			  in bytes.

			  For Axon, 0x00000100 (I think ...)

    - phy-mode          : string, mode of operations of the PHY interface.

			  Supported values are: "mii", "rmii", "smii", "rgmii",

			  "tbi", "gmii", rtbi", "sgmii".

			  For Axon on CAB, it is "rgmii"

    - mdio-device       : 1 cell, required iff using shared MDIO registers

			  (440EP).  phandle of the EMAC to use to drive the

			  MDIO lines for the PHY used by this EMAC.

    - zmii-device       : 1 cell, required iff connected to a ZMII.  phandle of

			  the ZMII device node

    - zmii-channel      : 1 cell, required iff connected to a ZMII.  Which ZMII

			  channel or 0xffffffff if ZMII is only used for MDIO.

    - rgmii-device      : 1 cell, required iff connected to an RGMII. phandle

			  of the RGMII device node.

			  For Axon: phandle of plb5/plb4/opb/rgmii

    - rgmii-channel     : 1 cell, required iff connected to an RGMII.  Which

			  RGMII channel is used by this EMAC.

			  Fox Axon: present, whatever value is appropriate for each

			  EMAC, that is the content of the current (bogus) "phy-port"

			  property.



    Recommended properties:

    - linux,network-index : This is the intended "index" of this

      network device.  This is used by the bootwrapper to interpret

      MAC addresses passed by the firmware when no information other

      than indices is available to associate an address with a device.



    Optional properties:

    - phy-address       : 1 cell, optional, MDIO address of the PHY. If absent,

			  a search is performed.

    - phy-map           : 1 cell, optional, bitmap of addresses to probe the PHY

			  for, used if phy-address is absent. bit 0x00000001 is

			  MDIO address 0.

			  For Axon it can be absent, thouugh my current driver

			  doesn't handle phy-address yet so for now, keep

			  0x00ffffff in it.

    - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec

			  operations (if absent the value is the same as

			  rx-fifo-size).  For Axon, either absent or 2048.

    - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec

			  operations (if absent the value is the same as

			  tx-fifo-size). For Axon, either absent or 2048.

    - tah-device        : 1 cell, optional. If connected to a TAH engine for

			  offload, phandle of the TAH device node.

    - tah-channel       : 1 cell, optional. If appropriate, channel used on the

			  TAH engine.



    Example:



	EMAC0: ethernet@40000800 {

		linux,network-index = <0>;

		device_type = "network";

		compatible = "ibm,emac-440gp", "ibm,emac";

		interrupt-parent = <&UIC1>;

		interrupts = <1c 4 1d 4>;

		reg = <40000800 70>;

		local-mac-address = [00 04 AC E3 1B 1E];

		mal-device = <&MAL0>;

		mal-tx-channel = <0 1>;

		mal-rx-channel = <0>;

		cell-index = <0>;

		max-frame-size = <5dc>;

		rx-fifo-size = <1000>;

		tx-fifo-size = <800>;

		phy-mode = "rmii";

		phy-map = <00000001>;

		zmii-device = <&ZMII0>;

		zmii-channel = <0>;

	};



      ii) McMAL node



    Required properties:

    - device_type        : "dma-controller"

    - compatible         : compatible list, containing 2 entries, first is

			   "ibm,mcmal-CHIP" where CHIP is the host ASIC (like

			   emac) and the second is either "ibm,mcmal" or

			   "ibm,mcmal2".

			   For Axon, "ibm,mcmal-axon","ibm,mcmal2"

    - interrupts         : <interrupt mapping for the MAL interrupts sources:

                           5 sources: tx_eob, rx_eob, serr, txde, rxde>.

                           For Axon: This is _different_ from the current

			   firmware.  We use the "delayed" interrupts for txeob

			   and rxeob. Thus we end up with mapping those 5 MPIC

			   interrupts, all level positive sensitive: 10, 11, 32,

			   33, 34 (in decimal)

    - dcr-reg            : < DCR registers range >

    - dcr-parent         : if needed for dcr-reg

    - num-tx-chans       : 1 cell, number of Tx channels

    - num-rx-chans       : 1 cell, number of Rx channels



      iii) ZMII node



    Required properties:

    - compatible         : compatible list, containing 2 entries, first is

			   "ibm,zmii-CHIP" where CHIP is the host ASIC (like

			   EMAC) and the second is "ibm,zmii".

			   For Axon, there is no ZMII node.

    - reg                : <registers mapping>



      iv) RGMII node



    Required properties:

    - compatible         : compatible list, containing 2 entries, first is

			   "ibm,rgmii-CHIP" where CHIP is the host ASIC (like

			   EMAC) and the second is "ibm,rgmii".

                           For Axon, "ibm,rgmii-axon","ibm,rgmii"

    - reg                : <registers mapping>

    - revision           : as provided by the RGMII new version register if

			   available.

			   For Axon: 0x0000012a



   More devices will be defined as this spec matures.



VII - Specifying interrupt information for devices

arch/powerpc/platforms/44x/Kconfig

+1 −2
Original line number Diff line number Diff line
@@ -38,8 +38,7 @@ config 440EP 


config 440GP

	bool

# Disabled until the new EMAC Driver is merged.

#	select IBM_NEW_EMAC_ZMII

	select IBM_NEW_EMAC_ZMII



config 440GX

	bool

arch/powerpc/platforms/cell/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -10,6 +10,10 @@ config PPC_CELL_NATIVE 
	select PPC_INDIRECT_IO

	select PPC_NATIVE

	select MPIC

	select IBM_NEW_EMAC_EMAC4

	select IBM_NEW_EMAC_RGMII

	select IBM_NEW_EMAC_ZMII #test only

	select IBM_NEW_EMAC_TAH  #test only

	default n



config PPC_IBM_CELL_BLADE

drivers/net/Kconfig

+2 −69
Original line number Diff line number Diff line
@@ -1247,75 +1247,8 @@ config IBMVETH 
	  <file:Documentation/networking/net-modules.txt>. The module will

	  be called ibmveth.



config IBM_EMAC

	tristate "PowerPC 4xx on-chip Ethernet support"

	depends on 4xx && !PPC_MERGE

	help

	  This driver supports the PowerPC 4xx EMAC family of on-chip

          Ethernet controllers.



config IBM_EMAC_RXB

	int "Number of receive buffers"

	depends on IBM_EMAC

	default "128"



config IBM_EMAC_TXB

	int "Number of transmit buffers"

	depends on IBM_EMAC

	default "64"



config IBM_EMAC_POLL_WEIGHT

	int "MAL NAPI polling weight"

	depends on IBM_EMAC

	default "32"



config IBM_EMAC_RX_COPY_THRESHOLD

	int "RX skb copy threshold (bytes)"

	depends on IBM_EMAC

	default "256"



config IBM_EMAC_RX_SKB_HEADROOM

	int "Additional RX skb headroom (bytes)"

	depends on IBM_EMAC

	default "0"

	help

	  Additional receive skb headroom. Note, that driver

	  will always reserve at least 2 bytes to make IP header

	  aligned, so usually there is no need to add any additional

	  headroom.

	  

	  If unsure, set to 0.



config IBM_EMAC_PHY_RX_CLK_FIX

	bool "PHY Rx clock workaround"

	depends on IBM_EMAC && (405EP || 440GX || 440EP || 440GR)

	help

	  Enable this if EMAC attached to a PHY which doesn't generate

	  RX clock if there is no link, if this is the case, you will 

	  see "TX disable timeout" or "RX disable timeout" in the system

	  log.

	  

	  If unsure, say N.



config IBM_EMAC_DEBUG

	bool "Debugging"

	depends on IBM_EMAC

	default n



config IBM_EMAC_ZMII

	bool

	depends on IBM_EMAC && (NP405H || NP405L || 44x)

	default y



config IBM_EMAC_RGMII

	bool

	depends on IBM_EMAC && 440GX

	default y

		

config IBM_EMAC_TAH

	bool

	depends on IBM_EMAC && 440GX

	default y

source "drivers/net/ibm_emac/Kconfig"

source "drivers/net/ibm_newemac/Kconfig"



config NET_PCI

	bool "EISA, VLB, PCI and on board controllers"

drivers/net/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ 
obj-$(CONFIG_E1000) += e1000/

obj-$(CONFIG_E1000E) += e1000e/

obj-$(CONFIG_IBM_EMAC) += ibm_emac/

obj-$(CONFIG_IBM_NEW_EMAC) += ibm_newemac/

obj-$(CONFIG_IXGBE) += ixgbe/

obj-$(CONFIG_IXGB) += ixgb/

obj-$(CONFIG_IP1000) += ipg.o