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Commit 1d09de7d authored by Manuel Lauss's avatar Manuel Lauss Committed by Ralf Baechle
Browse files

MIPS: Alchemy: introduce helpers to access SYS register block. 



This patch changes all absolute SYS_XY registers to offsets from the
SYS block base, prefixes them with AU1000 to avoid silent failures due
to changed addresses, and introduces helper functions to read/write
them.

No functional changes, comparing assembly of a few select functions shows
no differences.

Signed-off-by: default avatarManuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7464/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 2ef1bb99

arch/mips/alchemy/board-mtx1.c

+2 −2
Original line number Diff line number Diff line
@@ -85,10 +85,10 @@ void __init board_setup(void) 
#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */



	/* Initialize sys_pinfunc */

	au_writel(SYS_PF_NI2, SYS_PINFUNC);

	alchemy_wrsys(SYS_PF_NI2, AU1000_SYS_PINFUNC);



	/* Initialize GPIO */

	au_writel(~0, KSEG1ADDR(AU1000_SYS_PHYS_ADDR) + SYS_TRIOUTCLR);

	alchemy_wrsys(~0, AU1000_SYS_TRIOUTCLR);

	alchemy_gpio_direction_output(0, 0);	/* Disable M66EN (PCI 66MHz) */

	alchemy_gpio_direction_output(3, 1);	/* Disable PCI CLKRUN# */

	alchemy_gpio_direction_output(1, 1);	/* Enable EXT_IO3 */

arch/mips/alchemy/board-xxs1500.c

+2 −2
Original line number Diff line number Diff line
@@ -87,9 +87,9 @@ void __init board_setup(void) 
	alchemy_gpio2_enable();



	/* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */

	pin_func  = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;

	pin_func  = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;

	pin_func |= SYS_PF_UR3;

	au_writel(pin_func, SYS_PINFUNC);

	alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);



	/* Enable UART */

	alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);

arch/mips/alchemy/common/clocks.c

+3 −3
Original line number Diff line number Diff line
@@ -91,13 +91,13 @@ unsigned long au1xxx_calc_clock(void) 
	if (au1xxx_cpu_has_pll_wo())

		cpu_speed = 396000000;

	else

		cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;

		cpu_speed = (alchemy_rdsys(AU1000_SYS_CPUPLL) & 0x3f) * AU1000_SRC_CLK;



	/* On Alchemy CPU:counter ratio is 1:1 */

	mips_hpt_frequency = cpu_speed;

	/* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */

	set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)

							  & 0x03) + 2) * 16));

	set_au1x00_uart_baud_base(cpu_speed / (2 *

		((alchemy_rdsys(AU1000_SYS_POWERCTRL) & 0x03) + 2) * 16));



	set_au1x00_speed(cpu_speed);

arch/mips/alchemy/common/irq.c

+2 −3
Original line number Diff line number Diff line
@@ -389,13 +389,12 @@ static int au1x_ic1_setwake(struct irq_data *d, unsigned int on) 
		return -EINVAL;



	local_irq_save(flags);

	wakemsk = __raw_readl((void __iomem *)SYS_WAKEMSK);

	wakemsk = alchemy_rdsys(AU1000_SYS_WAKEMSK);

	if (on)

		wakemsk |= 1 << bit;

	else

		wakemsk &= ~(1 << bit);

	__raw_writel(wakemsk, (void __iomem *)SYS_WAKEMSK);

	wmb();

	alchemy_wrsys(wakemsk, AU1000_SYS_WAKEMSK);

	local_irq_restore(flags);



	return 0;

arch/mips/alchemy/common/platform.c

+1 −1
Original line number Diff line number Diff line
@@ -420,7 +420,7 @@ static void __init alchemy_setup_macs(int ctype) 
		memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);



	/* Register second MAC if enabled in pinfunc */

	if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2)) {

	if (!(alchemy_rdsys(AU1000_SYS_PINFUNC) & SYS_PF_NI2)) {

		ret = platform_device_register(&au1xxx_eth1_device);

		if (ret)

			printk(KERN_INFO "Alchemy: failed to register MAC1\n");