Loading arch/arm64/boot/dts/qcom/msm8909.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -326,7 +326,7 @@ reg-names = "rcg-base", "efuse"; qcom,safe-freq = < 400000000 >; cpu-vdd-supply = <&pm8909_s1_corner_ao>; qcom,a7ssmux-opp-store-vcorner = <&CPU0>; qcom,enable-opp; clocks = <&clock_gcc clk_gpll0_ao_clk_src>, <&clock_gcc clk_a7sspll>; clock-names = "clk-4", "clk-5"; Loading arch/arm64/boot/dts/qcom/msm8909w.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -28,7 +28,7 @@ clocks = <&clock_gcc clk_gpll0_ao_clk_src>, <&clock_gcc clk_a7sspll>; clock-names = "clk-4", "clk-5"; qcom,a7ssmux-opp-store-vcorner = <&CPU0>; qcom,enable-opp; qcom,speed0-bin-v0 = < 0 0>, < 800000000 4>, Loading Loading
arch/arm64/boot/dts/qcom/msm8909.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -326,7 +326,7 @@ reg-names = "rcg-base", "efuse"; qcom,safe-freq = < 400000000 >; cpu-vdd-supply = <&pm8909_s1_corner_ao>; qcom,a7ssmux-opp-store-vcorner = <&CPU0>; qcom,enable-opp; clocks = <&clock_gcc clk_gpll0_ao_clk_src>, <&clock_gcc clk_a7sspll>; clock-names = "clk-4", "clk-5"; Loading
arch/arm64/boot/dts/qcom/msm8909w.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -28,7 +28,7 @@ clocks = <&clock_gcc clk_gpll0_ao_clk_src>, <&clock_gcc clk_a7sspll>; clock-names = "clk-4", "clk-5"; qcom,a7ssmux-opp-store-vcorner = <&CPU0>; qcom,enable-opp; qcom,speed0-bin-v0 = < 0 0>, < 800000000 4>, Loading