Loading drivers/gpu/drm/msm/sde/sde_hw_catalog.c +7 −0 Original line number Diff line number Diff line Loading @@ -2126,6 +2126,9 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, vig_list_size += ARRAY_SIZE(rgb_10bit_formats) + ARRAY_SIZE(tp10_ubwc_formats) + ARRAY_SIZE(p010_formats); if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400)) vig_list_size += ARRAY_SIZE(p010_ubwc_formats); wb2_list_size += ARRAY_SIZE(rgb_10bit_formats) + ARRAY_SIZE(tp10_ubwc_formats); Loading Loading @@ -2164,6 +2167,10 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, ARRAY_SIZE(rgb_10bit_formats)); index += _sde_copy_formats(sde_cfg->vig_formats, vig_list_size, index, p010_formats, ARRAY_SIZE(p010_formats)); if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400)) index += _sde_copy_formats(sde_cfg->vig_formats, vig_list_size, index, p010_ubwc_formats, ARRAY_SIZE(p010_ubwc_formats)); index += _sde_copy_formats(sde_cfg->vig_formats, vig_list_size, index, tp10_ubwc_formats, Loading drivers/gpu/drm/msm/sde/sde_hw_catalog_format.h +5 −0 Original line number Diff line number Diff line Loading @@ -171,6 +171,11 @@ static const struct sde_format_extended p010_formats[] = { {DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_DX}, }; static const struct sde_format_extended p010_ubwc_formats[] = { {DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_DX | DRM_FORMAT_MOD_QCOM_COMPRESSED}, }; static const struct sde_format_extended tp10_ubwc_formats[] = { {DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_COMPRESSED | DRM_FORMAT_MOD_QCOM_DX | DRM_FORMAT_MOD_QCOM_TIGHT}, Loading Loading
drivers/gpu/drm/msm/sde/sde_hw_catalog.c +7 −0 Original line number Diff line number Diff line Loading @@ -2126,6 +2126,9 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, vig_list_size += ARRAY_SIZE(rgb_10bit_formats) + ARRAY_SIZE(tp10_ubwc_formats) + ARRAY_SIZE(p010_formats); if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400)) vig_list_size += ARRAY_SIZE(p010_ubwc_formats); wb2_list_size += ARRAY_SIZE(rgb_10bit_formats) + ARRAY_SIZE(tp10_ubwc_formats); Loading Loading @@ -2164,6 +2167,10 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, ARRAY_SIZE(rgb_10bit_formats)); index += _sde_copy_formats(sde_cfg->vig_formats, vig_list_size, index, p010_formats, ARRAY_SIZE(p010_formats)); if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400)) index += _sde_copy_formats(sde_cfg->vig_formats, vig_list_size, index, p010_ubwc_formats, ARRAY_SIZE(p010_ubwc_formats)); index += _sde_copy_formats(sde_cfg->vig_formats, vig_list_size, index, tp10_ubwc_formats, Loading
drivers/gpu/drm/msm/sde/sde_hw_catalog_format.h +5 −0 Original line number Diff line number Diff line Loading @@ -171,6 +171,11 @@ static const struct sde_format_extended p010_formats[] = { {DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_DX}, }; static const struct sde_format_extended p010_ubwc_formats[] = { {DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_DX | DRM_FORMAT_MOD_QCOM_COMPRESSED}, }; static const struct sde_format_extended tp10_ubwc_formats[] = { {DRM_FORMAT_NV12, DRM_FORMAT_MOD_QCOM_COMPRESSED | DRM_FORMAT_MOD_QCOM_DX | DRM_FORMAT_MOD_QCOM_TIGHT}, Loading