clk: qcom: gcc-sdm845: Add reset clock registers for PCIE PHY on SDM845

Add the missing PCIE PHY BCR register modelling on SDM845.

Change-Id: I6791abaaf56d3fb5181126516d1c911117ac0444
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>