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Commit 19df0c2f authored by Tejun Heo's avatar Tejun Heo
Browse files

percpu: align percpu readmostly subsection to cacheline 



Currently percpu readmostly subsection may share cachelines with other
percpu subsections which may result in unnecessary cacheline bounce
and performance degradation.

This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
linker macros, makes each arch linker scripts specify its cacheline
size and use it to align percpu subsections.

This is based on Shaohua's x86 only patch.

Signed-off-by: default avatarTejun Heo <tj@kernel.org>
Cc: Shaohua Li <shaohua.li@intel.com>
parent c723fdab

arch/alpha/kernel/vmlinux.lds.S

+1 −1
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ SECTIONS 
	__init_begin = ALIGN(PAGE_SIZE);

	INIT_TEXT_SECTION(PAGE_SIZE)

	INIT_DATA_SECTION(16)

	PERCPU(PAGE_SIZE)

	PERCPU(64, PAGE_SIZE)

	/* Align to THREAD_SIZE rather than PAGE_SIZE here so any padding page

	   needed for the THREAD_SIZE aligned init_task gets freed after init */

	. = ALIGN(THREAD_SIZE);

arch/arm/kernel/vmlinux.lds.S

+1 −1
Original line number Diff line number Diff line
@@ -70,7 +70,7 @@ SECTIONS 
#endif

	}



	PERCPU(PAGE_SIZE)

	PERCPU(32, PAGE_SIZE)



#ifndef CONFIG_XIP_KERNEL

	. = ALIGN(PAGE_SIZE);

arch/blackfin/kernel/vmlinux.lds.S

+1 −1
Original line number Diff line number Diff line
@@ -136,7 +136,7 @@ SECTIONS 


	. = ALIGN(16);

	INIT_DATA_SECTION(16)

	PERCPU(4)

	PERCPU(32, 4)



	.exit.data :

	{

arch/cris/kernel/vmlinux.lds.S

+1 −1
Original line number Diff line number Diff line
@@ -107,7 +107,7 @@ SECTIONS 
#endif

	__vmlinux_end = .;		/* Last address of the physical file. */

#ifdef CONFIG_ETRAX_ARCH_V32

	PERCPU(PAGE_SIZE)

	PERCPU(32, PAGE_SIZE)



	.init.ramfs : {

		INIT_RAM_FS

arch/frv/kernel/vmlinux.lds.S

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ SECTIONS 
  _einittext = .;



  INIT_DATA_SECTION(8)

  PERCPU(4096)

  PERCPU(L1_CACHE_BYTES, 4096)



  . = ALIGN(PAGE_SIZE);

  __init_end = .;