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Commit 19c5e32c authored by Alan Kwong's avatar Alan Kwong
Browse files

drm/msm/sde: remove extra entries from interrupt table 



Four extra reserved entries are allocated in 88-91. These
entries do not affect lookup logics but are conflicting
with index listed in the documentation. Remove these
extra reserved entries to match index with documentation.

Change-Id: Id9e3a35e9bee9d13b479d7ef65dca1912ea1ff80
Signed-off-by: default avatarAlan Kwong <akwong@codeaurora.org>
parent ed8aedf2

drivers/gpu/drm/msm/sde/sde_hw_interrupts.c

+4 −9
Original line number Diff line number Diff line
@@ -395,37 +395,32 @@ static const struct sde_irq_type sde_irq_map[] = { 
		SDE_INTR_HIST_VIG_1_RSTSEQ_DONE, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	/* irq_idx: 68-71 */

	/* irq_idx: 72-75 */

	{ SDE_IRQ_TYPE_HIST_VIG_DONE, SSPP_VIG2, SDE_INTR_HIST_VIG_2_DONE, 2},

	{ SDE_IRQ_TYPE_HIST_VIG_RSTSEQ, SSPP_VIG2,

		SDE_INTR_HIST_VIG_2_RSTSEQ_DONE, 2},

	{ SDE_IRQ_TYPE_HIST_VIG_DONE, SSPP_VIG3, SDE_INTR_HIST_VIG_3_DONE, 2},

	{ SDE_IRQ_TYPE_HIST_VIG_RSTSEQ, SSPP_VIG3,

		SDE_INTR_HIST_VIG_3_RSTSEQ_DONE, 2},

	/* irq_idx: 72-75 */

	/* irq_idx: 76-79 */

	{ SDE_IRQ_TYPE_HIST_DSPP_DONE, DSPP_0, SDE_INTR_HIST_DSPP_0_DONE, 2},

	{ SDE_IRQ_TYPE_HIST_DSPP_RSTSEQ, DSPP_0,

		SDE_INTR_HIST_DSPP_0_RSTSEQ_DONE, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	/* irq_idx: 76-79 */

	/* irq_idx: 80-83 */

	{ SDE_IRQ_TYPE_HIST_DSPP_DONE, DSPP_1, SDE_INTR_HIST_DSPP_1_DONE, 2},

	{ SDE_IRQ_TYPE_HIST_DSPP_RSTSEQ, DSPP_1,

		SDE_INTR_HIST_DSPP_1_RSTSEQ_DONE, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	/* irq_idx: 80-83 */

	/* irq_idx: 84-87 */

	{ SDE_IRQ_TYPE_HIST_DSPP_DONE, DSPP_2, SDE_INTR_HIST_DSPP_2_DONE, 2},

	{ SDE_IRQ_TYPE_HIST_DSPP_RSTSEQ, DSPP_2,

		SDE_INTR_HIST_DSPP_2_RSTSEQ_DONE, 2},

	{ SDE_IRQ_TYPE_HIST_DSPP_DONE, DSPP_3, SDE_INTR_HIST_DSPP_3_DONE, 2},

	{ SDE_IRQ_TYPE_HIST_DSPP_RSTSEQ, DSPP_3,

		SDE_INTR_HIST_DSPP_3_RSTSEQ_DONE, 2},

	/* irq_idx: 84-87 */

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	/* irq_idx: 88-91 */

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},

	{ SDE_IRQ_TYPE_RESERVED, 0, 0, 2},