Commit 19bf09ce authored Apr 29, 2015 by Alexandre Courbot Committed by Ben Skeggs Jul 27, 2015

drm/nouveau/gr/gf100: wait on bottom half of FE's pipeline



When emitting the ICMD bundle, wait on the bottom half (bit 3 of the
GR_STATUS register) instead of upper half (bit 2) to make sure methods
are effectively emitted.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

parent 1addc126

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -699,7 +699,7 @@ gf100_gr_icmd(struct gf100_gr_priv priv, const struct gf100_gr_pack p)

		while (addr < next) {
		nv_wr32(priv, 0x400200, addr);
		nv_wait(priv, 0x400700, 0x00000002, 0x00000000);
		nv_wait(priv, 0x400700, 0x00000004, 0x00000000);
		addr += init->pitch;
		}
		}