Merge "ARM: dts: msm: Add sdhc1 and sdhc2 support for QM215"

	};

	};

};

};

&sdhc_1 {

	/* device core power supply */

	vdd-supply = <&pm8916_l8>;

	qcom,vdd-voltage-level = <2900000 2900000>;

	qcom,vdd-current-level = <200 400000>;

	/*

	 * device communication power is an external

	 * regulator eLDO3, which is enabled via L5A

	 */

	vdd-io-supply = <&pm8916_l5>;

	qcom,vdd-io-always-on;

	qcom,vdd-io-lpm-sup;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 325000>;

	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;

	qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000

								384000000>;

	qcom,nonremovable;

	qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";

	status = "ok";

};

&sdhc_2 {

	/* device core power supply */

	vdd-supply = <&pm8916_l11>;

	qcom,vdd-voltage-level = <2950000 2950000>;

	qcom,vdd-current-level = <15000 800000>;

	/* device communication power supply */

	vdd-io-supply = <&pm8916_l12>;

	qcom,vdd-io-voltage-level = <1800000 2950000>;

	qcom,vdd-io-current-level = <200 22000>;

	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;

	cd-gpios = <&tlmm 67 0x0>;

	qcom,clk-rates = <400000 20000000 25000000 50000000 100000000

								200000000>;

	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";

	status = "ok";

};

&mdss_dsi_active {

&mdss_dsi_active {

	mux {

	mux {

		pins = "gpio60", "gpio93", "gpio94";

		pins = "gpio60", "gpio93", "gpio94";