Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/fsl-espi',...

For PSC in UART mode the needed PSC serial devices

are specified by fsl,mpc5121-psc-uart nodes in the

fsl,mpc5121-immr SoC node. Additionally the PSC FIFO

Controller node fsl,mpc5121-psc-fifo is requered there:

Controller node fsl,mpc5121-psc-fifo is required there:

fsl,mpc5121-psc-uart nodes

fsl,mpc512x-psc-uart nodes

--------------------------

Required properties :

 - compatible : Should contain "fsl,mpc5121-psc-uart" and "fsl,mpc5121-psc"

 - cell-index : Index of the PSC in hardware

 - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc"

   Supported <soc>s: mpc5121, mpc5125

 - reg : Offset and length of the register set for the PSC device

 - interrupts : <a b> where a is the interrupt number of the

   PSC FIFO Controller and b is a field that represents an

 - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4)

 - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4)

PSC in SPI mode

---------------

fsl,mpc5121-psc-fifo node

Similar to the UART mode a PSC can be operated in SPI mode. The compatible used

for that is fsl,mpc5121-psc-spi. It requires a fsl,mpc5121-psc-fifo as well.

The required and recommended properties are identical to the

fsl,mpc5121-psc-uart nodes, just use spi instead of uart in the compatible

string.

fsl,mpc512x-psc-fifo node

-------------------------

Required properties :

 - compatible : Should be "fsl,mpc5121-psc-fifo"

 - compatible : Should be "fsl,<soc>-psc-fifo"

   Supported <soc>s: mpc5121, mpc5125

 - reg : Offset and length of the register set for the PSC

         FIFO Controller

 - interrupts : <a b> where a is the interrupt number of the

 - interrupt-parent : the phandle for the interrupt controller that

   services interrupts for this device.

Recommended properties :

 - clocks : specifies the clock needed to operate the fifo controller

 - clock-names : name(s) for the clock(s) listed in clocks

Example for a board using PSC0 and PSC1 devices in serial mode:

Optional properties:

- cs-gpios : Specifies the gpio pis to be used for chipselects.

- num-cs : The number of chipselects. If omitted, this will default to 4.

- reg-io-width : The I/O register width (in bytes) implemented by this

  device.  Supported values are 2 or 4 (the default).

Child nodes as per the generic SPI binding.

Optional properties:

- img,supports-quad-mode: Should be set if the interface supports quad mode

  SPI transfers.

- spfi-max-frequency: Maximum speed supported by the spfi block.

Example:

/* Structure of the hardware registers */

struct mpc52xx_psc {

	union {

		u8	mode;		/* PSC + 0x00 */

		u8	mr2;

	};

	u8		reserved0[3];

	union {				/* PSC + 0x04 */

		u16	status;

	dws->max_freq = clk_get_rate(dwsmmio->clk);

	of_property_read_u32(pdev->dev.of_node, "reg-io-width",

			     &dws->reg_io_width);

	num_cs = 4;

	if (pdev->dev.of_node)