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Commit 18773dce authored by Marc Zyngier's avatar Marc Zyngier Committed by Channagoud Kadabi
Browse files

arm64: Move post_ttbr_update_workaround to C code



We will soon need to invoke a CPU-specific function pointer after changing
page tables, so move post_ttbr_update_workaround out into C code to make
this possible.

Change-Id: I8031daeddbce05538d12c7a67ef17a880ffc3dcb
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Patch-mainline: linux-arm-kernel @ 01/08/18, 9:32
Signed-off-by: default avatarChannagoud Kadabi <ckadabi@codeaurora.org>
parent b038787d
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+0 −13
Original line number Original line Diff line number Diff line
@@ -452,17 +452,4 @@ alternative_endif
	mrs	\rd, sp_el0
	mrs	\rd, sp_el0
	.endm
	.endm


/*
 * Errata workaround post TTBRx_EL1 update.
 */
	.macro	post_ttbr_update_workaround
#ifdef CONFIG_CAVIUM_ERRATUM_27456
alternative_if ARM64_WORKAROUND_CAVIUM_27456
	ic	iallu
	dsb	nsh
	isb
alternative_else_nop_endif
#endif
	.endm

#endif	/* __ASM_ASSEMBLER_H */
#endif	/* __ASM_ASSEMBLER_H */
+1 −1
Original line number Original line Diff line number Diff line
@@ -223,7 +223,7 @@ alternative_else_nop_endif
	 * Cavium erratum 27456 (broadcast TLBI instructions may cause I-cache
	 * Cavium erratum 27456 (broadcast TLBI instructions may cause I-cache
	 * corruption).
	 * corruption).
	 */
	 */
	post_ttbr_update_workaround
	bl	post_ttbr_update_workaround
	.endif
	.endif
1:
1:
	.if	\el != 0
	.if	\el != 0
+9 −0
Original line number Original line Diff line number Diff line
@@ -238,6 +238,15 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu)
		cpu_switch_mm(mm->pgd, mm);
		cpu_switch_mm(mm->pgd, mm);
}
}


/* Errata workaround post TTBRx_EL1 update. */
asmlinkage void post_ttbr_update_workaround(void)
{
	asm(ALTERNATIVE("nop; nop; nop",
			"ic iallu; dsb nsh; isb",
			ARM64_WORKAROUND_CAVIUM_27456,
			CONFIG_CAVIUM_ERRATUM_27456));
}

static int asids_init(void)
static int asids_init(void)
{
{
	asid_bits = get_cpu_asid_bits();
	asid_bits = get_cpu_asid_bits();
+1 −2
Original line number Original line Diff line number Diff line
@@ -191,8 +191,7 @@ ENTRY(cpu_do_switch_mm)
	isb
	isb
	msr	ttbr0_el1, x0			// now update TTBR0
	msr	ttbr0_el1, x0			// now update TTBR0
	isb
	isb
	post_ttbr_update_workaround
	b	post_ttbr_update_workaround	// Back to C code...
	ret
ENDPROC(cpu_do_switch_mm)
ENDPROC(cpu_do_switch_mm)


	.pushsection ".idmap.text", "ax"
	.pushsection ".idmap.text", "ax"