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Commit 180b813c authored by Kenneth Graunke's avatar Kenneth Graunke Committed by Daniel Vetter
Browse files

drm/i915: Add OACONTROL to the command parser register whitelist. 



Mesa needs to be able to write OACONTROL in order to expose the
Observability Architecture's performance counters via OpenGL.

Signed-off-by: default avatarKenneth Graunke <kenneth@whitecape.org>
[danvet: Add comment that this is just a temporary work-around and
that we need to check more things before we can allow OACONTROL writes
for real everywhere.]
[danvet 2: Squash in fixup to avoid a DRM_ERROR due to unsorted reg
list, spotted by Jani.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 5c411bb1

drivers/gpu/drm/i915/i915_cmd_parser.c

+6 −0
Original line number Diff line number Diff line
@@ -407,6 +407,12 @@ static const u32 gen7_render_regs[] = { 
	REG64(CL_PRIMITIVES_COUNT),

	REG64(PS_INVOCATION_COUNT),

	REG64(PS_DEPTH_COUNT),

	/*

	 * FIXME: This is just to keep mesa working for now, we need to check

	 * that mesa resets this again and that it doesn't use any of the

	 * special modes which write into the gtt.

	 */

	OACONTROL,

	REG64(GEN7_SO_NUM_PRIMS_WRITTEN(0)),

	REG64(GEN7_SO_NUM_PRIMS_WRITTEN(1)),

	REG64(GEN7_SO_NUM_PRIMS_WRITTEN(2)),

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -427,6 +427,8 @@ 
/* There are the 4 64-bit counter registers, one for each stream output */

#define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8)



#define OACONTROL 0x2360



#define _GEN7_PIPEA_DE_LOAD_SL	0x70068

#define _GEN7_PIPEB_DE_LOAD_SL	0x71068

#define GEN7_PIPE_DE_LOAD_SL(pipe) _PIPE(pipe, \