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Commit 180ae7b1 authored by Eric Auger's avatar Eric Auger Committed by Marc Zyngier
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KVM: arm/arm64: Enable irqchip routing 



This patch adds compilation and link against irqchip.

Main motivation behind using irqchip code is to enable MSI
routing code. In the future irqchip routing may also be useful
when targeting multiple irqchips.

Routing standard callbacks now are implemented in vgic-irqfd:
- kvm_set_routing_entry
- kvm_set_irq
- kvm_set_msi

They only are supported with new_vgic code.

Both HAVE_KVM_IRQCHIP and HAVE_KVM_IRQ_ROUTING are defined.
KVM_CAP_IRQ_ROUTING is advertised and KVM_SET_GSI_ROUTING is allowed.

So from now on IRQCHIP routing is enabled and a routing table entry
must exist for irqfd injection to succeed for a given SPI. This patch
builds a default flat irqchip routing table (gsi=irqchip.pin) covering
all the VGIC SPI indexes. This routing table is overwritten by the
first first user-space call to KVM_SET_GSI_ROUTING ioctl.

MSI routing setup is not yet allowed.

Signed-off-by: default avatarEric Auger <eric.auger@redhat.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent d9565a73

Documentation/virtual/kvm/api.txt

+8 −4
Original line number Diff line number Diff line
@@ -1433,13 +1433,16 @@ KVM_ASSIGN_DEV_IRQ. Partial deassignment of host or guest IRQ is allowed. 
4.52 KVM_SET_GSI_ROUTING



Capability: KVM_CAP_IRQ_ROUTING

Architectures: x86 s390

Architectures: x86 s390 arm arm64

Type: vm ioctl

Parameters: struct kvm_irq_routing (in)

Returns: 0 on success, -1 on error



Sets the GSI routing table entries, overwriting any previously set entries.



On arm/arm64, GSI routing has the following limitation:

- GSI routing does not apply to KVM_IRQ_LINE but only to KVM_IRQFD.



struct kvm_irq_routing {

	__u32 nr;

	__u32 flags;
@@ -2374,9 +2377,10 @@ Note that closing the resamplefd is not sufficient to disable the 
irqfd.  The KVM_IRQFD_FLAG_RESAMPLE is only necessary on assignment

and need not be specified with KVM_IRQFD_FLAG_DEASSIGN.



On ARM/ARM64, the gsi field in the kvm_irqfd struct specifies the Shared

Peripheral Interrupt (SPI) index, such that the GIC interrupt ID is

given by gsi + 32.

On arm/arm64, gsi routing being supported, the following can happen:

- in case no routing entry is associated to this gsi, injection fails

- in case the gsi is associated to an irqchip routing entry,

  irqchip.pin + 32 corresponds to the injected SPI ID.



4.76 KVM_PPC_ALLOCATE_HTAB

arch/arm/kvm/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -32,6 +32,8 @@ config KVM 
	select KVM_VFIO

	select HAVE_KVM_EVENTFD

	select HAVE_KVM_IRQFD

	select HAVE_KVM_IRQCHIP

	select HAVE_KVM_IRQ_ROUTING

	depends on ARM_VIRT_EXT && ARM_LPAE && ARM_ARCH_TIMER

	---help---

	  Support hosting virtualized guest machines.

arch/arm/kvm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -29,4 +29,5 @@ obj-y += $(KVM)/arm/vgic/vgic-v2.o 
obj-y += $(KVM)/arm/vgic/vgic-mmio.o

obj-y += $(KVM)/arm/vgic/vgic-mmio-v2.o

obj-y += $(KVM)/arm/vgic/vgic-kvm-device.o

obj-y += $(KVM)/irqchip.o

obj-y += $(KVM)/arm/arch_timer.o

arch/arm/kvm/irq.h

0 → 100644
+19 −0
Original line number Diff line number Diff line 
/*

 * irq.h: in kernel interrupt controller related definitions

 * Copyright (c) 2016 Red Hat, Inc.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This header is included by irqchip.c. However, on ARM, interrupt

 * controller declarations are located in include/kvm/arm_vgic.h since

 * they are mostly shared between arm and arm64.

 */



#ifndef __IRQ_H

#define __IRQ_H



#include <kvm/arm_vgic.h>



#endif

arch/arm64/kvm/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -37,6 +37,8 @@ config KVM 
	select KVM_ARM_VGIC_V3

	select KVM_ARM_PMU if HW_PERF_EVENTS

	select HAVE_KVM_MSI

	select HAVE_KVM_IRQCHIP

	select HAVE_KVM_IRQ_ROUTING

	---help---

	  Support hosting virtualized guest machines.

	  We don't support KVM with 16K page tables yet, due to the multiple