Loading drivers/phy/phy-qcom-ufs-qrbtc-msmskunk.h +8 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,9 @@ #define QSERDES_COM_PLL_CLKEPDIV COM_OFF(0xB0) #define QSERDES_COM_RESET_SM COM_OFF(0xBC) /* TX LANE n (0, 1) registers */ #define QSERDES_TX_CLKBUF_ENABLE(n) TX_OFF(n, 0x4) /* RX LANE n (0, 1) registers */ #define QSERDES_RX_CDR_CONTROL(n) RX_OFF(n, 0x0) #define QSERDES_RX_RX_IQ_RXDET_EN(n) RX_OFF(n, 0x28) Loading Loading @@ -95,6 +98,11 @@ static struct ufs_qcom_phy_calibration phy_cal_table_rate_A[] = { UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_RXTXEPCLK_EN, 0x13), UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CRCTRL, 0x43), /* QSERDES TX */ /* Enable large amplitude setting */ UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_CLKBUF_ENABLE(0), 0x29), UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_CLKBUF_ENABLE(1), 0x29), /* QSERDES RX0 */ UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_PWM_CNTRL1(0), 0x08), UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_PWM_CNTRL2(0), 0x40), Loading Loading
drivers/phy/phy-qcom-ufs-qrbtc-msmskunk.h +8 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,9 @@ #define QSERDES_COM_PLL_CLKEPDIV COM_OFF(0xB0) #define QSERDES_COM_RESET_SM COM_OFF(0xBC) /* TX LANE n (0, 1) registers */ #define QSERDES_TX_CLKBUF_ENABLE(n) TX_OFF(n, 0x4) /* RX LANE n (0, 1) registers */ #define QSERDES_RX_CDR_CONTROL(n) RX_OFF(n, 0x0) #define QSERDES_RX_RX_IQ_RXDET_EN(n) RX_OFF(n, 0x28) Loading Loading @@ -95,6 +98,11 @@ static struct ufs_qcom_phy_calibration phy_cal_table_rate_A[] = { UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_RXTXEPCLK_EN, 0x13), UFS_QCOM_PHY_CAL_ENTRY(QSERDES_COM_PLL_CRCTRL, 0x43), /* QSERDES TX */ /* Enable large amplitude setting */ UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_CLKBUF_ENABLE(0), 0x29), UFS_QCOM_PHY_CAL_ENTRY(QSERDES_TX_CLKBUF_ENABLE(1), 0x29), /* QSERDES RX0 */ UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_PWM_CNTRL1(0), 0x08), UFS_QCOM_PHY_CAL_ENTRY(QSERDES_RX_PWM_CNTRL2(0), 0x40), Loading