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Commit 171bb2f1 authored by John Crispin's avatar John Crispin Committed by Ralf Baechle
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MIPS: Lantiq: Add initial support for Lantiq SoCs 



Add initial support for Mips based SoCs made by Lantiq. This series will add
support for the XWAY family.

The series allows booting a minimal system using a initramfs or NOR. Missing
drivers and support for Amazon and GPON family will be provided in a later
series.

[Ralf: Remove some cargo cult programming and fixed formatting.]

Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
Signed-off-by: default avatarRalph Hempel <ralph.hempel@lantiq.com>
Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2252/
Patchwork: https://patchwork.linux-mips.org/patch/2371/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c0a5afb9

arch/mips/Kbuild.platforms

+1 −0
Original line number Original line Diff line number Diff line
@@ -11,6 +11,7 @@ platforms += dec 
platforms += emma

platforms += emma

platforms += jazz

platforms += jazz

platforms += jz4740

platforms += jz4740

platforms += lantiq

platforms += lasat

platforms += lasat

platforms += loongson

platforms += loongson

platforms += mipssim

platforms += mipssim

arch/mips/Kconfig

+17 −0
Original line number Original line Diff line number Diff line
@@ -212,6 +212,23 @@ config MACH_JZ4740 
	select HAVE_PWM

	select HAVE_PWM

	select HAVE_CLK

	select HAVE_CLK





config LANTIQ

	bool "Lantiq based platforms"

	select DMA_NONCOHERENT

	select IRQ_CPU

	select CEVT_R4K

	select CSRC_R4K

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_HAS_CPU_MIPS32_R2

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_MULTITHREADING

	select SYS_HAS_EARLY_PRINTK

	select ARCH_REQUIRE_GPIOLIB

	select SWAP_IO_SPACE

	select BOOT_RAW

	select HAVE_CLK



config LASAT

config LASAT

	bool "LASAT Networks platforms"

	bool "LASAT Networks platforms"

	select CEVT_R4K

	select CEVT_R4K

arch/mips/include/asm/mach-lantiq/lantiq.h

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+63 −0
Original line number Original line Diff line number Diff line 
/*

 *  This program is free software; you can redistribute it and/or modify it

 *  under the terms of the GNU General Public License version 2 as published

 *  by the Free Software Foundation.

 *

 *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>

 */

#ifndef _LANTIQ_H__

#define _LANTIQ_H__



#include <linux/irq.h>



/* generic reg access functions */

#define ltq_r32(reg)		__raw_readl(reg)

#define ltq_w32(val, reg)	__raw_writel(val, reg)

#define ltq_w32_mask(clear, set, reg)	\

	ltq_w32((ltq_r32(reg) & ~(clear)) | (set), reg)

#define ltq_r8(reg)		__raw_readb(reg)

#define ltq_w8(val, reg)	__raw_writeb(val, reg)



/* register access macros for EBU and CGU */

#define ltq_ebu_w32(x, y)	ltq_w32((x), ltq_ebu_membase + (y))

#define ltq_ebu_r32(x)		ltq_r32(ltq_ebu_membase + (x))

#define ltq_cgu_w32(x, y)	ltq_w32((x), ltq_cgu_membase + (y))

#define ltq_cgu_r32(x)		ltq_r32(ltq_cgu_membase + (x))



extern __iomem void *ltq_ebu_membase;

extern __iomem void *ltq_cgu_membase;



extern unsigned int ltq_get_cpu_ver(void);

extern unsigned int ltq_get_soc_type(void);



/* clock speeds */

#define CLOCK_60M	60000000

#define CLOCK_83M	83333333

#define CLOCK_111M	111111111

#define CLOCK_133M	133333333

#define CLOCK_167M	166666667

#define CLOCK_200M	200000000

#define CLOCK_266M	266666666

#define CLOCK_333M	333333333

#define CLOCK_400M	400000000



/* spinlock all ebu i/o */

extern spinlock_t ebu_lock;



/* some irq helpers */

extern void ltq_disable_irq(struct irq_data *data);

extern void ltq_mask_and_ack_irq(struct irq_data *data);

extern void ltq_enable_irq(struct irq_data *data);



/* find out what caused the last cpu reset */

extern int ltq_reset_cause(void);

#define LTQ_RST_CAUSE_WDTRST	0x20



#define IOPORT_RESOURCE_START	0x10000000

#define IOPORT_RESOURCE_END	0xffffffff

#define IOMEM_RESOURCE_START	0x10000000

#define IOMEM_RESOURCE_END	0xffffffff

#define LTQ_FLASH_START		0x10000000

#define LTQ_FLASH_MAX		0x04000000



#endif

arch/mips/include/asm/mach-lantiq/war.h

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+24 −0
Original line number Original line Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 */

#ifndef __ASM_MIPS_MACH_LANTIQ_WAR_H

#define __ASM_MIPS_MACH_LANTIQ_WAR_H



#define R4600_V1_INDEX_ICACHEOP_WAR     0

#define R4600_V1_HIT_CACHEOP_WAR        0

#define R4600_V2_HIT_CACHEOP_WAR        0

#define R5432_CP0_INTERRUPT_WAR         0

#define BCM1250_M3_WAR                  0

#define SIBYTE_1956_WAR                 0

#define MIPS4K_ICACHE_REFILL_WAR        0

#define MIPS_CACHE_SYNC_WAR             0

#define TX49XX_ICACHE_INDEX_INV_WAR     0

#define RM9000_CDEX_SMP_WAR             0

#define ICACHE_REFILLS_WORKAROUND_WAR   0

#define R10000_LLSC_WAR                 0

#define MIPS34K_MISSED_ITLB_WAR         0



#endif

arch/mips/lantiq/Makefile

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+9 −0
Original line number Original line Diff line number Diff line 
# Copyright (C) 2010 John Crispin <blogic@openwrt.org>

#

# This program is free software; you can redistribute it and/or modify it

# under the terms of the GNU General Public License version 2 as published

# by the Free Software Foundation.



obj-y := irq.o setup.o clk.o prom.o



obj-$(CONFIG_EARLY_PRINTK) += early_printk.o