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Commit 163f5264 authored by Rajkumar Manoharan's avatar Rajkumar Manoharan Committed by Kalle Valo
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ath10k: bypass PLL setting on target init for QCA9888 



Some of of qca988x solutions are having global reset issue
during target initialization. Bypassing PLL setting before
downloading firmware and letting the SoC run on REF_CLK is fixing
the problem. Corresponding firmware change is also needed to set
the clock source once the target is initialized. Since 10.2.4
firmware is having this ROM patch, applying skip_clock_init only
for 10.2.4 firmware versions.

Signed-off-by: default avatarRajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent e451c1db

drivers/net/wireless/ath/ath10k/core.c

+16 −0
Original line number Diff line number Diff line
@@ -1085,6 +1085,22 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) 
	if (status)

		goto err;



	/* Some of of qca988x solutions are having global reset issue

         * during target initialization. Bypassing PLL setting before

         * downloading firmware and letting the SoC run on REF_CLK is

         * fixing the problem. Corresponding firmware change is also needed

         * to set the clock source once the target is initialized.

	 */

	if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,

		     ar->fw_features)) {

		status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);

		if (status) {

			ath10k_err(ar, "could not write to skip_clock_init: %d\n",

				   status);

			goto err;

		}

	}



	status = ath10k_download_fw(ar, mode);

	if (status)

		goto err;

drivers/net/wireless/ath/ath10k/core.h

+3 −0
Original line number Diff line number Diff line
@@ -468,6 +468,9 @@ enum ath10k_fw_features { 
	 */

	ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,



	/* Firmware supports bypassing PLL setting on init. */

	ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,



	/* keep last */

	ATH10K_FW_FEATURE_COUNT,

};