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Commit 15b9f80e authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: enable parity error interrupts 



The previous patch put all the code, and handlers in place. It should
now be safe to enable the parity error interrupt. The parity error must
be unmasked in both the GTIMR, and the CS IMR. Unfortunately, the docs
aren't clear about this; nevertheless it's the truth.

Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent e3689190

drivers/gpu/drm/i915/i915_irq.c

+2 −2
Original line number Diff line number Diff line
@@ -1889,13 +1889,13 @@ static int ivybridge_irq_postinstall(struct drm_device *dev) 
		   DE_PIPEA_VBLANK_IVB);

	POSTING_READ(DEIER);



	dev_priv->gt_irq_mask = ~0;

	dev_priv->gt_irq_mask = ~GT_GEN7_L3_PARITY_ERROR_INTERRUPT;



	I915_WRITE(GTIIR, I915_READ(GTIIR));

	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);



	render_irqs = GT_USER_INTERRUPT | GEN6_BSD_USER_INTERRUPT |

		GEN6_BLITTER_USER_INTERRUPT;

		GEN6_BLITTER_USER_INTERRUPT | GT_GEN7_L3_PARITY_ERROR_INTERRUPT;

	I915_WRITE(GTIER, render_irqs);

	POSTING_READ(GTIER);

drivers/gpu/drm/i915/intel_ringbuffer.c

+12 −2
Original line number Diff line number Diff line
@@ -427,6 +427,9 @@ static int init_render_ring(struct intel_ring_buffer *ring) 
	if (INTEL_INFO(dev)->gen >= 6)

		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));



	if (IS_IVYBRIDGE(dev))

		I915_WRITE_IMR(ring, ~GEN6_RENDER_L3_PARITY_ERROR);



	return ret;

}
@@ -814,6 +817,10 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring) 


	spin_lock_irqsave(&dev_priv->irq_lock, flags);

	if (ring->irq_refcount++ == 0) {

		if (IS_IVYBRIDGE(dev) && ring->id == RCS)

			I915_WRITE_IMR(ring, ~(ring->irq_enable_mask |

						GEN6_RENDER_L3_PARITY_ERROR));

		else

			I915_WRITE_IMR(ring, ~ring->irq_enable_mask);

		dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;

		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
@@ -833,6 +840,9 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring) 


	spin_lock_irqsave(&dev_priv->irq_lock, flags);

	if (--ring->irq_refcount == 0) {

		if (IS_IVYBRIDGE(dev) && ring->id == RCS)

			I915_WRITE_IMR(ring, ~GEN6_RENDER_L3_PARITY_ERROR);

		else

			I915_WRITE_IMR(ring, ~0);

		dev_priv->gt_irq_mask |= ring->irq_enable_mask;

		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);