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Commit 15b536ec authored by Kyle Yan's avatar Kyle Yan Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Add debug information for opcode error interrupts" into msm-4.9

parents 5000e896 a602c025

drivers/gpu/msm/a6xx_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -70,6 +70,8 @@ 
#define A6XX_CP_ADDR_MODE_CNTL           0x842

#define A6XX_CP_PROTECT_CNTL             0x84F

#define A6XX_CP_PROTECT_REG              0x850

#define A6XX_CP_SQE_STAT_ADDR            0x908

#define A6XX_CP_SQE_STAT_DATA            0x909

#define A6XX_CP_ALWAYS_ON_COUNTER_LO     0x980

#define A6XX_CP_ALWAYS_ON_COUNTER_HI     0x981

#define A6XX_CP_AHB_CNTL                 0x98D

drivers/gpu/msm/adreno_a6xx.c

+8 −2
Original line number Diff line number Diff line
@@ -514,8 +514,14 @@ static void a6xx_cp_hw_err_callback(struct adreno_device *adreno_dev, int bit) 


	kgsl_regread(device, A6XX_CP_INTERRUPT_STATUS, &status1);



	if (status1 & BIT(A6XX_CP_OPCODE_ERROR))

		KGSL_DRV_CRIT_RATELIMIT(device, "CP opcode error interrupt\n");

	if (status1 & BIT(A6XX_CP_OPCODE_ERROR)) {

		unsigned int opcode;



		kgsl_regwrite(device, A6XX_CP_SQE_STAT_ADDR, 1);

		kgsl_regread(device, A6XX_CP_SQE_STAT_DATA, &opcode);

		KGSL_DRV_CRIT_RATELIMIT(device,

		"CP opcode error interrupt | possible opcode=0x%8.8x\n");

	}

	if (status1 & BIT(A6XX_CP_UCODE_ERROR))

		KGSL_DRV_CRIT_RATELIMIT(device, "CP ucode error interrupt\n");

	if (status1 & BIT(A6XX_CP_HW_FAULT_ERROR)) {