Loading drivers/clk/qcom/mdss/mdss-pll-util.c +48 −1 Original line number Diff line number Diff line /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -17,6 +17,8 @@ #include <linux/err.h> #include <linux/string.h> #include <linux/clk/msm-clock-generic.h> #include <linux/of_address.h> #include <linux/dma-mapping.h> #include "mdss-pll.h" Loading Loading @@ -324,6 +326,48 @@ static int mdss_pll_util_parse_dt_clock(struct platform_device *pdev, return rc; } static int mdss_pll_util_parse_dt_dfps(struct platform_device *pdev, struct mdss_pll_resources *pll_res) { int rc = 0; struct device_node *pnode; void __iomem *addr; pnode = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); if (IS_ERR_OR_NULL(pnode)) { rc = PTR_ERR(pnode); goto pnode_err; } /* get the physical address for pll codes */ addr = of_iomap(pnode, 0); if (IS_ERR_OR_NULL(addr)) { rc = PTR_ERR(addr); pr_err("couldn't get dfps physical address\n"); goto pnode_err; } pll_res->dfps = kzalloc(sizeof(struct dfps_info), GFP_KERNEL); if (IS_ERR_OR_NULL(pll_res->dfps)) { rc = PTR_ERR(pll_res->dfps); pr_err("couldn't allocate dfps kernel memory\n"); goto addr_err; } /* memcopy complete dfps structure from physical memory */ memcpy_fromio(pll_res->dfps, addr, sizeof(struct dfps_info)); addr_err: iounmap(addr); pnode_err: if (pnode) of_node_put(pnode); dma_release_declared_memory(&pdev->dev); return rc; } int mdss_pll_util_resource_parse(struct platform_device *pdev, struct mdss_pll_resources *pll_res) { Loading @@ -342,6 +386,9 @@ int mdss_pll_util_resource_parse(struct platform_device *pdev, goto clk_err; } if (mdss_pll_util_parse_dt_dfps(pdev, pll_res)) pr_err("dfps not enabled!\n"); return rc; clk_err: Loading drivers/clk/qcom/mdss/mdss-pll.h +32 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,32 @@ enum { MDSS_PLL_TARGET_8996, }; #define DFPS_MAX_NUM_OF_FRAME_RATES 10 struct dfps_panel_info { uint32_t enabled; uint32_t frame_rate_cnt; uint32_t frame_rate[DFPS_MAX_NUM_OF_FRAME_RATES]; /* hz */ }; struct dfps_pll_codes { uint32_t pll_codes_1; uint32_t pll_codes_2; }; struct dfps_codes_info { uint32_t is_valid; uint32_t frame_rate; /* hz */ uint32_t clk_rate; /* hz */ struct dfps_pll_codes pll_codes; }; struct dfps_info { struct dfps_panel_info panel_dfps; struct dfps_codes_info codes_dfps[DFPS_MAX_NUM_OF_FRAME_RATES]; void *dfps_fb_base; }; struct mdss_pll_resources { /* Pll specific resources like GPIO, power supply, clocks, etc*/ Loading Loading @@ -136,6 +162,12 @@ struct mdss_pll_resources { int revision; void *priv; /* * dynamic refresh pll codes stored in this structure */ struct dfps_info *dfps; }; struct mdss_pll_vco_calc { Loading Loading
drivers/clk/qcom/mdss/mdss-pll-util.c +48 −1 Original line number Diff line number Diff line /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -17,6 +17,8 @@ #include <linux/err.h> #include <linux/string.h> #include <linux/clk/msm-clock-generic.h> #include <linux/of_address.h> #include <linux/dma-mapping.h> #include "mdss-pll.h" Loading Loading @@ -324,6 +326,48 @@ static int mdss_pll_util_parse_dt_clock(struct platform_device *pdev, return rc; } static int mdss_pll_util_parse_dt_dfps(struct platform_device *pdev, struct mdss_pll_resources *pll_res) { int rc = 0; struct device_node *pnode; void __iomem *addr; pnode = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); if (IS_ERR_OR_NULL(pnode)) { rc = PTR_ERR(pnode); goto pnode_err; } /* get the physical address for pll codes */ addr = of_iomap(pnode, 0); if (IS_ERR_OR_NULL(addr)) { rc = PTR_ERR(addr); pr_err("couldn't get dfps physical address\n"); goto pnode_err; } pll_res->dfps = kzalloc(sizeof(struct dfps_info), GFP_KERNEL); if (IS_ERR_OR_NULL(pll_res->dfps)) { rc = PTR_ERR(pll_res->dfps); pr_err("couldn't allocate dfps kernel memory\n"); goto addr_err; } /* memcopy complete dfps structure from physical memory */ memcpy_fromio(pll_res->dfps, addr, sizeof(struct dfps_info)); addr_err: iounmap(addr); pnode_err: if (pnode) of_node_put(pnode); dma_release_declared_memory(&pdev->dev); return rc; } int mdss_pll_util_resource_parse(struct platform_device *pdev, struct mdss_pll_resources *pll_res) { Loading @@ -342,6 +386,9 @@ int mdss_pll_util_resource_parse(struct platform_device *pdev, goto clk_err; } if (mdss_pll_util_parse_dt_dfps(pdev, pll_res)) pr_err("dfps not enabled!\n"); return rc; clk_err: Loading
drivers/clk/qcom/mdss/mdss-pll.h +32 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,32 @@ enum { MDSS_PLL_TARGET_8996, }; #define DFPS_MAX_NUM_OF_FRAME_RATES 10 struct dfps_panel_info { uint32_t enabled; uint32_t frame_rate_cnt; uint32_t frame_rate[DFPS_MAX_NUM_OF_FRAME_RATES]; /* hz */ }; struct dfps_pll_codes { uint32_t pll_codes_1; uint32_t pll_codes_2; }; struct dfps_codes_info { uint32_t is_valid; uint32_t frame_rate; /* hz */ uint32_t clk_rate; /* hz */ struct dfps_pll_codes pll_codes; }; struct dfps_info { struct dfps_panel_info panel_dfps; struct dfps_codes_info codes_dfps[DFPS_MAX_NUM_OF_FRAME_RATES]; void *dfps_fb_base; }; struct mdss_pll_resources { /* Pll specific resources like GPIO, power supply, clocks, etc*/ Loading Loading @@ -136,6 +162,12 @@ struct mdss_pll_resources { int revision; void *priv; /* * dynamic refresh pll codes stored in this structure */ struct dfps_info *dfps; }; struct mdss_pll_vco_calc { Loading