ARM: dts: msm: Update speed bin tables for the 3 CPUCC domains on SDM845

Frequencies above 600 MHz do not need a post-divider. Update
the speed bin configurations for all three CPU clock domains
to correct this.

Change-Id: Ia8e215a5467b10eb9b4966cf9018897476c483a7
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>