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Commit 14f79637 authored by Janusz Krzysztofik's avatar Janusz Krzysztofik Committed by Tony Lindgren
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omap: McBSP: Use macros for all register read/write operations 



There are several places where readw()/writew() functions are used instead of
OMAP_MCBSP_READ()/WRITE() macros for manipulating McBSP registers. Replace
them with macros to ensure consistent behaviour after caching is introduced.

Tested on OMAP1510 based Amstrad Delta.
Compile-tested with omap_3430sdp_defconfig.

Signed-off-by: default avatarJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Acked-by: default avatarPeter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: default avatarJarkko Nikula <jhnikula@gmail.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent c127c7dc

arch/arm/plat-omap/mcbsp.c

+22 −22
Original line number Diff line number Diff line
@@ -636,26 +636,26 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf) 
	mcbsp = id_to_mcbsp_ptr(id);

	base = mcbsp->io_base;



	writew(buf, base + OMAP_MCBSP_REG_DXR1);

	OMAP_MCBSP_WRITE(base, DXR1, buf);

	/* if frame sync error - clear the error */

	if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {

	if (OMAP_MCBSP_READ(base, SPCR2) & XSYNC_ERR) {

		/* clear error */

		writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),

		       base + OMAP_MCBSP_REG_SPCR2);

		OMAP_MCBSP_WRITE(base, SPCR2,

				OMAP_MCBSP_READ(base, SPCR2) & (~XSYNC_ERR));

		/* resend */

		return -1;

	} else {

		/* wait for transmit confirmation */

		int attemps = 0;

		while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {

		while (!(OMAP_MCBSP_READ(base, SPCR2) & XRDY)) {

			if (attemps++ > 1000) {

				writew(readw(base + OMAP_MCBSP_REG_SPCR2) &

				       (~XRST),

				       base + OMAP_MCBSP_REG_SPCR2);

				OMAP_MCBSP_WRITE(base, SPCR2,

						OMAP_MCBSP_READ(base, SPCR2) &

						(~XRST));

				udelay(10);

				writew(readw(base + OMAP_MCBSP_REG_SPCR2) |

				       (XRST),

				       base + OMAP_MCBSP_REG_SPCR2);

				OMAP_MCBSP_WRITE(base, SPCR2,

						OMAP_MCBSP_READ(base, SPCR2) |

						(XRST));

				udelay(10);

				dev_err(mcbsp->dev, "Could not write to"

					" McBSP%d Register\n", mcbsp->id);
@@ -681,24 +681,24 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf) 


	base = mcbsp->io_base;

	/* if frame sync error - clear the error */

	if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {

	if (OMAP_MCBSP_READ(base, SPCR1) & RSYNC_ERR) {

		/* clear error */

		writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),

		       base + OMAP_MCBSP_REG_SPCR1);

		OMAP_MCBSP_WRITE(base, SPCR1,

				OMAP_MCBSP_READ(base, SPCR1) & (~RSYNC_ERR));

		/* resend */

		return -1;

	} else {

		/* wait for recieve confirmation */

		int attemps = 0;

		while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {

		while (!(OMAP_MCBSP_READ(base, SPCR1) & RRDY)) {

			if (attemps++ > 1000) {

				writew(readw(base + OMAP_MCBSP_REG_SPCR1) &

				       (~RRST),

				       base + OMAP_MCBSP_REG_SPCR1);

				OMAP_MCBSP_WRITE(base, SPCR1,

						OMAP_MCBSP_READ(base, SPCR1) &

						(~RRST));

				udelay(10);

				writew(readw(base + OMAP_MCBSP_REG_SPCR1) |

				       (RRST),

				       base + OMAP_MCBSP_REG_SPCR1);

				OMAP_MCBSP_WRITE(base, SPCR1,

						OMAP_MCBSP_READ(base, SPCR1) |

						(RRST));

				udelay(10);

				dev_err(mcbsp->dev, "Could not read from"

					" McBSP%d Register\n", mcbsp->id);
@@ -706,7 +706,7 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf) 
			}

		}

	}

	*buf = readw(base + OMAP_MCBSP_REG_DRR1);

	*buf = OMAP_MCBSP_READ(base, DRR1);



	return 0;

}