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Commit 14accea7 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 4.9.39 into android-4.9 



Changes in 4.9.39
	xen-netfront: Rework the fix for Rx stall during OOM and network stress
	net_sched: fix error recovery at qdisc creation
	net: sched: Fix one possible panic when no destroy callback
	net/phy: micrel: configure intterupts after autoneg workaround
	ipv6: avoid unregistering inet6_dev for loopback
	net: dp83640: Avoid NULL pointer dereference.
	tcp: reset sk_rx_dst in tcp_disconnect()
	net: prevent sign extension in dev_get_stats()
	bridge: mdb: fix leak on complete_info ptr on fail path
	rocker: move dereference before free
	bpf: prevent leaking pointer via xadd on unpriviledged
	net: handle NAPI_GRO_FREE_STOLEN_HEAD case also in napi_frags_finish()
	net/mlx5: Cancel delayed recovery work when unloading the driver
	liquidio: fix bug in soft reset failure detection
	net/mlx5e: Fix TX carrier errors report in get stats ndo
	ipv6: dad: don't remove dynamic addresses if link is down
	vxlan: fix hlist corruption
	net: core: Fix slab-out-of-bounds in netdev_stats_to_stats64
	net: ipv6: Compare lwstate in detecting duplicate nexthops
	vrf: fix bug_on triggered by rx when destroying a vrf
	rds: tcp: use sock_create_lite() to create the accept socket
	brcmfmac: fix possible buffer overflow in brcmf_cfg80211_mgmt_tx()
	brcmfmac: Fix a memory leak in error handling path in 'brcmf_cfg80211_attach'
	brcmfmac: Fix glom_skb leak in brcmf_sdiod_recv_chain
	sfc: don't read beyond unicast address list
	cfg80211: Define nla_policy for NL80211_ATTR_LOCAL_MESH_POWER_MODE
	cfg80211: Validate frequencies nested in NL80211_ATTR_SCAN_FREQUENCIES
	cfg80211: Check if PMKID attribute is of expected size
	cfg80211: Check if NAN service ID is of expected size
	irqchip/gic-v3: Fix out-of-bound access in gic_set_affinity
	parisc: Report SIGSEGV instead of SIGBUS when running out of stack
	parisc: use compat_sys_keyctl()
	parisc: DMA API: return error instead of BUG_ON for dma ops on non dma devs
	parisc/mm: Ensure IRQs are off in switch_mm()
	tools/lib/lockdep: Reduce MAX_LOCK_DEPTH to avoid overflowing lock_chain/: Depth
	thp, mm: fix crash due race in MADV_FREE handling
	kernel/extable.c: mark core_kernel_text notrace
	mm/list_lru.c: fix list_lru_count_node() to be race free
	fs/dcache.c: fix spin lockup issue on nlru->lock
	checkpatch: silence perl 5.26.0 unescaped left brace warnings
	binfmt_elf: use ELF_ET_DYN_BASE only for PIE
	arm: move ELF_ET_DYN_BASE to 4MB
	arm64: move ELF_ET_DYN_BASE to 4GB / 4MB
	powerpc: move ELF_ET_DYN_BASE to 4GB / 4MB
	s390: reduce ELF_ET_DYN_BASE
	exec: Limit arg stack to at most 75% of _STK_LIM
	ARM64: dts: marvell: armada37xx: Fix timer interrupt specifiers
	vt: fix unchecked __put_user() in tioclinux ioctls
	rcu: Add memory barriers for NOCB leader wakeup
	nvmem: core: fix leaks on registration errors
	mnt: In umount propagation reparent in a separate pass
	mnt: In propgate_umount handle visiting mounts in any order
	mnt: Make propagate_umount less slow for overlapping mount propagation trees
	selftests/capabilities: Fix the test_execve test
	mm: fix overflow check in expand_upwards()
	crypto: talitos - Extend max key length for SHA384/512-HMAC and AEAD
	crypto: atmel - only treat EBUSY as transient if backlog
	crypto: sha1-ssse3 - Disable avx2
	crypto: caam - properly set IV after {en,de}crypt
	crypto: caam - fix signals handling
	Revert "sched/core: Optimize SCHED_SMT"
	sched/fair, cpumask: Export for_each_cpu_wrap()
	sched/topology: Fix building of overlapping sched-groups
	sched/topology: Optimize build_group_mask()
	sched/topology: Fix overlapping sched_group_mask
	PM / wakeirq: Convert to SRCU
	PM / QoS: return -EINVAL for bogus strings
	tracing: Use SOFTIRQ_OFFSET for softirq dectection for more accurate results
	kvm: vmx: Do not disable intercepts for BNDCFGS
	kvm: x86: Guest BNDCFGS requires guest MPX support
	kvm: vmx: Check value written to IA32_BNDCFGS
	kvm: vmx: allow host to access guest MSR_IA32_BNDCFGS
	4.9.39

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parents c4676ffb c03917de

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 9

SUBLEVEL = 38

SUBLEVEL = 39

EXTRAVERSION =

NAME = Roaring Lionus

arch/arm/include/asm/elf.h

+2 −6
Original line number Diff line number Diff line
@@ -112,12 +112,8 @@ int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs); 
#define CORE_DUMP_USE_REGSET

#define ELF_EXEC_PAGESIZE	4096



/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical

   use of this is to invoke "./ld.so someprog" to test out a new version of

   the loader.  We need to make sure that it is out of the way of the program

   that it will "exec", and that there is sufficient room for the brk.  */



#define ELF_ET_DYN_BASE	(TASK_SIZE / 3 * 2)

/* This is the base location for PIE (ET_DYN with INTERP) loads. */

#define ELF_ET_DYN_BASE		0x400000UL



/* When the program starts, a1 contains a pointer to a function to be 

   registered with atexit, as per the SVR4 ABI.  A value of 0 means we

arch/arm64/boot/dts/marvell/armada-37xx.dtsi

+4 −8
Original line number Diff line number Diff line
@@ -75,14 +75,10 @@ 


	timer {

		compatible = "arm,armv8-timer";

		interrupts = <GIC_PPI 13

			(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,

			     <GIC_PPI 14

			(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,

			     <GIC_PPI 11

			(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,

			     <GIC_PPI 10

			(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;

		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;

	};



	soc {

arch/arm64/include/asm/elf.h

+6 −6
Original line number Diff line number Diff line
@@ -113,12 +113,11 @@ 
#define ELF_EXEC_PAGESIZE	PAGE_SIZE



/*

 * This is the location that an ET_DYN program is loaded if exec'ed.  Typical

 * use of this is to invoke "./ld.so someprog" to test out a new version of

 * the loader.  We need to make sure that it is out of the way of the program

 * that it will "exec", and that there is sufficient room for the brk.

 * This is the base location for PIE (ET_DYN with INTERP) loads. On

 * 64-bit, this is raised to 4GB to leave the entire 32-bit address

 * space open for things that want to use the area for 32-bit pointers.

 */

#define ELF_ET_DYN_BASE	(2 * TASK_SIZE_64 / 3)

#define ELF_ET_DYN_BASE		0x100000000UL



#ifndef __ASSEMBLY__
@@ -169,7 +168,8 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm, 


#ifdef CONFIG_COMPAT



#define COMPAT_ELF_ET_DYN_BASE		(2 * TASK_SIZE_32 / 3)

/* PIE load location for compat arm. Must match ARM ELF_ET_DYN_BASE. */

#define COMPAT_ELF_ET_DYN_BASE		0x000400000UL



/* AArch32 registers. */

#define COMPAT_ELF_NGREG		18

arch/parisc/include/asm/dma-mapping.h

+7 −4
Original line number Diff line number Diff line
@@ -20,6 +20,8 @@ 
** flush/purge and allocate "regular" cacheable pages for everything.

*/



#define DMA_ERROR_CODE	(~(dma_addr_t)0)



#ifdef CONFIG_PA11

extern struct dma_map_ops pcxl_dma_ops;

extern struct dma_map_ops pcx_dma_ops;
@@ -54,12 +56,13 @@ parisc_walk_tree(struct device *dev) 
			break;

		}

	}

	BUG_ON(!dev->platform_data);

	return dev->platform_data;

}



#define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu)

	

#define GET_IOC(dev) ({					\

	void *__pdata = parisc_walk_tree(dev);		\

	__pdata ? HBA_DATA(__pdata)->iommu : NULL;	\

})



#ifdef CONFIG_IOMMU_CCIO

struct parisc_device;