Loading drivers/usb/dwc3/ep0.c +7 −2 Original line number Diff line number Diff line Loading @@ -1143,13 +1143,18 @@ static void dwc3_ep0_do_control_status(struct dwc3 *dwc, __dwc3_ep0_do_control_status(dwc, dep); } static void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep) void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep) { struct dwc3_gadget_ep_cmd_params params; u32 cmd; int ret; if (!dep->resource_index) /* * For status/DATA OUT stage, TRB will be queued on ep0 out * endpoint for which resource index is zero. Hence allow * queuing ENDXFER command for ep0 out endpoint. */ if (!dep->resource_index && dep->number) return; cmd = DWC3_DEPCMD_ENDTRANSFER; Loading drivers/usb/dwc3/gadget.c +10 −1 Original line number Diff line number Diff line Loading @@ -3154,8 +3154,17 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) * that EP0 is in setup phase by issuing a stall * and restart if EP0 is not in setup phase. */ if (dwc->ep0state != EP0_SETUP_PHASE) if (dwc->ep0state != EP0_SETUP_PHASE) { unsigned int dir; dbg_event(0xFF, "CONTRPEND", dwc->ep0state); dir = !!dwc->ep0_expect_in; if (dwc->ep0state == EP0_DATA_PHASE) dwc3_ep0_end_control_data(dwc, dwc->eps[dir]); else dwc3_ep0_end_control_data(dwc, dwc->eps[!dir]); dwc3_ep0_stall_and_restart(dwc); } dwc3_stop_active_transfers(dwc); dwc3_clear_stall_all_ep(dwc); Loading drivers/usb/dwc3/gadget.h +1 −0 Original line number Diff line number Diff line Loading @@ -98,6 +98,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, void dwc3_ep0_interrupt(struct dwc3 *dwc, const struct dwc3_event_depevt *event); void dwc3_ep0_out_start(struct dwc3 *dwc); void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep); void dwc3_ep0_stall_and_restart(struct dwc3 *dwc); int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value); int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value); Loading Loading
drivers/usb/dwc3/ep0.c +7 −2 Original line number Diff line number Diff line Loading @@ -1143,13 +1143,18 @@ static void dwc3_ep0_do_control_status(struct dwc3 *dwc, __dwc3_ep0_do_control_status(dwc, dep); } static void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep) void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep) { struct dwc3_gadget_ep_cmd_params params; u32 cmd; int ret; if (!dep->resource_index) /* * For status/DATA OUT stage, TRB will be queued on ep0 out * endpoint for which resource index is zero. Hence allow * queuing ENDXFER command for ep0 out endpoint. */ if (!dep->resource_index && dep->number) return; cmd = DWC3_DEPCMD_ENDTRANSFER; Loading
drivers/usb/dwc3/gadget.c +10 −1 Original line number Diff line number Diff line Loading @@ -3154,8 +3154,17 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) * that EP0 is in setup phase by issuing a stall * and restart if EP0 is not in setup phase. */ if (dwc->ep0state != EP0_SETUP_PHASE) if (dwc->ep0state != EP0_SETUP_PHASE) { unsigned int dir; dbg_event(0xFF, "CONTRPEND", dwc->ep0state); dir = !!dwc->ep0_expect_in; if (dwc->ep0state == EP0_DATA_PHASE) dwc3_ep0_end_control_data(dwc, dwc->eps[dir]); else dwc3_ep0_end_control_data(dwc, dwc->eps[!dir]); dwc3_ep0_stall_and_restart(dwc); } dwc3_stop_active_transfers(dwc); dwc3_clear_stall_all_ep(dwc); Loading
drivers/usb/dwc3/gadget.h +1 −0 Original line number Diff line number Diff line Loading @@ -98,6 +98,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, void dwc3_ep0_interrupt(struct dwc3 *dwc, const struct dwc3_event_depevt *event); void dwc3_ep0_out_start(struct dwc3 *dwc); void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep); void dwc3_ep0_stall_and_restart(struct dwc3 *dwc); int __dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value); int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value); Loading