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Commit 13b8a97a authored by Shengjiu Wang's avatar Shengjiu Wang Committed by Mark Brown
Browse files

ASoC: fsl_asrc: spba clock is needed by asrc device 



ASRC need to enable the spba clock, when sdma is using share peripheral
script. In this case, there is two spba master port is used, if don't
enable the clock, the spba bus will have arbitration issue, which may
cause read/write wrong data from/to ASRC registers

Signed-off-by: default avatarShengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: default avatarNicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 8005c49d

Documentation/devicetree/bindings/sound/fsl,asrc.txt

+5 −0
Original line number Diff line number Diff line
@@ -25,6 +25,11 @@ Required properties: 
	"mem"		  Peripheral access clock to access registers.

	"ipg"		  Peripheral clock to driver module.

	"asrck_<0-f>"	  Clock sources for input and output clock.

	"spba"		  The spba clock is required when ASRC is placed as a

			  bus slave of the Shared Peripheral Bus and when two

			  or more bus masters (CPU, DMA or DSP) try to access

			  it. This property is optional depending on the SoC

			  design.



   - big-endian		: If this property is absent, the little endian mode

			  will be in use as default. Otherwise, the big endian

sound/soc/fsl/fsl_asrc.c

+14 −0
Original line number Diff line number Diff line
@@ -859,6 +859,10 @@ static int fsl_asrc_probe(struct platform_device *pdev) 
		return PTR_ERR(asrc_priv->ipg_clk);

	}



	asrc_priv->spba_clk = devm_clk_get(&pdev->dev, "spba");

	if (IS_ERR(asrc_priv->spba_clk))

		dev_warn(&pdev->dev, "failed to get spba clock\n");



	for (i = 0; i < ASRC_CLK_MAX_NUM; i++) {

		sprintf(tmp, "asrck_%x", i);

		asrc_priv->asrck_clk[i] = devm_clk_get(&pdev->dev, tmp);
@@ -939,6 +943,11 @@ static int fsl_asrc_runtime_resume(struct device *dev) 
	ret = clk_prepare_enable(asrc_priv->ipg_clk);

	if (ret)

		goto disable_mem_clk;

	if (!IS_ERR(asrc_priv->spba_clk)) {

		ret = clk_prepare_enable(asrc_priv->spba_clk);

		if (ret)

			goto disable_ipg_clk;

	}

	for (i = 0; i < ASRC_CLK_MAX_NUM; i++) {

		ret = clk_prepare_enable(asrc_priv->asrck_clk[i]);

		if (ret)
@@ -950,6 +959,9 @@ static int fsl_asrc_runtime_resume(struct device *dev) 
disable_asrck_clk:

	for (i--; i >= 0; i--)

		clk_disable_unprepare(asrc_priv->asrck_clk[i]);

	if (!IS_ERR(asrc_priv->spba_clk))

		clk_disable_unprepare(asrc_priv->spba_clk);

disable_ipg_clk:

	clk_disable_unprepare(asrc_priv->ipg_clk);

disable_mem_clk:

	clk_disable_unprepare(asrc_priv->mem_clk);
@@ -963,6 +975,8 @@ static int fsl_asrc_runtime_suspend(struct device *dev) 


	for (i = 0; i < ASRC_CLK_MAX_NUM; i++)

		clk_disable_unprepare(asrc_priv->asrck_clk[i]);

	if (!IS_ERR(asrc_priv->spba_clk))

		clk_disable_unprepare(asrc_priv->spba_clk);

	clk_disable_unprepare(asrc_priv->ipg_clk);

	clk_disable_unprepare(asrc_priv->mem_clk);

sound/soc/fsl/fsl_asrc.h

+2 −0
Original line number Diff line number Diff line
@@ -426,6 +426,7 @@ struct fsl_asrc_pair { 
 * @paddr: physical address to the base address of registers

 * @mem_clk: clock source to access register

 * @ipg_clk: clock source to drive peripheral

 * @spba_clk: SPBA clock (optional, depending on SoC design)

 * @asrck_clk: clock sources to driver ASRC internal logic

 * @lock: spin lock for resource protection

 * @pair: pair pointers
@@ -442,6 +443,7 @@ struct fsl_asrc { 
	unsigned long paddr;

	struct clk *mem_clk;

	struct clk *ipg_clk;

	struct clk *spba_clk;

	struct clk *asrck_clk[ASRC_CLK_MAX_NUM];

	spinlock_t lock;