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Commit 110c1e1f authored by Ravikiran Thirumalai's avatar Ravikiran Thirumalai Committed by Ingo Molnar
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x86/vsmp: Ignore IOAPIC IRQ affinity if possible 



vSMP can route interrupts more optimally based on internal
knowledge the OS does not have. In order to support this
optimization, all CPUs must be able to handle all possible
IOAPIC interrupts.

Fix this by setting the vector allocation domain for all CPUs
and by enabling this feature in vSMP.

Signed-off-by: default avatarRavikiran Thirumalai <kiran.thirumalai@gmail.com>
Signed-off-by: default avatarShai Fultheim <shai@scalemp.com>
[ Rebased, simplified, and reworded the commit message. ]
Signed-off-by: default avatarIdo Yariv <ido@wizery.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 7db971b2

arch/x86/kernel/vsmp_64.c

+23 −4
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <linux/pci_ids.h>

#include <linux/pci_regs.h>

#include <linux/smp.h>

#include <linux/irq.h>



#include <asm/apic.h>

#include <asm/pci-direct.h>
@@ -95,6 +96,15 @@ static void __init set_vsmp_pv_ops(void) 
	ctl = readl(address + 4);

	printk(KERN_INFO "vSMP CTL: capabilities:0x%08x  control:0x%08x\n",

	       cap, ctl);



	/* If possible, let the vSMP foundation route the interrupt optimally */

#ifdef CONFIG_SMP

	if (cap & ctl & BIT(8)) {

		ctl &= ~BIT(8);

		no_irq_affinity = 1;

	}

#endif



	if (cap & ctl & (1 << 4)) {

		/* Setup irq ops and turn on vSMP  IRQ fastpath handling */

		pv_irq_ops.irq_disable = PV_CALLEE_SAVE(vsmp_irq_disable);
@@ -102,12 +112,11 @@ static void __init set_vsmp_pv_ops(void) 
		pv_irq_ops.save_fl  = PV_CALLEE_SAVE(vsmp_save_fl);

		pv_irq_ops.restore_fl  = PV_CALLEE_SAVE(vsmp_restore_fl);

		pv_init_ops.patch = vsmp_patch;



		ctl &= ~(1 << 4);

	}

	writel(ctl, address + 4);

	ctl = readl(address + 4);

		printk(KERN_INFO "vSMP CTL: control set to:0x%08x\n", ctl);

	}

	pr_info("vSMP CTL: control set to:0x%08x\n", ctl);



	early_iounmap(address, 8);

}
@@ -192,10 +201,20 @@ static int apicid_phys_pkg_id(int initial_apic_id, int index_msb) 
	return hard_smp_processor_id() >> index_msb;

}



/*

 * In vSMP, all cpus should be capable of handling interrupts, regardless of

 * the APIC used.

 */

static void fill_vector_allocation_domain(int cpu, struct cpumask *retmask)

{

	cpumask_setall(retmask);

}



static void vsmp_apic_post_init(void)

{

	/* need to update phys_pkg_id */

	apic->phys_pkg_id = apicid_phys_pkg_id;

	apic->vector_allocation_domain = fill_vector_allocation_domain;

}



void __init vsmp_init(void)