Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 10c8e056 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC driver changes from Olof Johansson:
 "A handful of driver-related changes.  We've had a bunch of them going
  in through other branches as well, so it's only a part of what we
  really have this release.

  Larger pieces are:

   - Removal of a now unused PWM driver for atmel
     [ This includes AVR32 changes that have been appropriately acked ]
   - Performance counter support for the arm CCN interconnect
   - OMAP mailbox driver cleanups and consolidation
   - PCI and SATA PHY drivers for SPEAr 13xx platforms
   - Redefinition (with backwards compatibility!) of PCI DT bindings for
     Tegra to better model regulators/power"

Note: this merge also fixes up the semantic conflict with the new
calling convention for devm_phy_create(), see commit f0ed8176 ("phy:
core: Let node ptr of PHY point to PHY and not of PHY provider") that
came in through Greg's USB tree.

Semantic merge patch by Stephen Rothwell <sfr@canb.auug.org.au> through
the next tree.

* tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  bus: arm-ccn: Fix error handling at event allocation
  mailbox/omap: add a parent structure for every IP instance
  mailbox/omap: remove the private mailbox structure
  mailbox/omap: consolidate OMAP mailbox driver
  mailbox/omap: simplify the fifo assignment by using macros
  mailbox/omap: remove omap_mbox_type_t from mailbox ops
  mailbox/omap: remove OMAP1 mailbox driver
  mailbox/omap: use devm_* interfaces
  bus: ARM CCN: add PERF_EVENTS dependency
  bus: ARM CCN PMU driver
  PCI: spear: Remove spear13xx_pcie_remove()
  PCI: spear: Fix Section mismatch compilation warning for probe()
  ARM: tegra: Remove legacy PCIe power supply properties
  PCI: tegra: Remove deprecated power supply properties
  PCI: tegra: Implement accurate power supply scheme
  ARM: SPEAr13xx: Update defconfigs
  ARM: SPEAr13xx: Add pcie and miphy DT nodes
  ARM: SPEAr13xx: Add bindings and dt node for misc block
  ARM: SPEAr13xx: Fix static mapping table
  phy: Add drivers for PCIe and SATA phy on SPEAr13xx
  ...
parents d4e1f5a1 3e528cb7

Documentation/arm/CCN.txt

0 → 100644
+52 −0
Original line number Diff line number Diff line 
ARM Cache Coherent Network

==========================



CCN-504 is a ring-bus interconnect consisting of 11 crosspoints

(XPs), with each crosspoint supporting up to two device ports,

so nodes (devices) 0 and 1 are connected to crosspoint 0,

nodes 2 and 3 to crosspoint 1 etc.



PMU (perf) driver

-----------------



The CCN driver registers a perf PMU driver, which provides

description of available events and configuration options

in sysfs, see /sys/bus/event_source/devices/ccn*.



The "format" directory describes format of the config, config1

and config2 fields of the perf_event_attr structure. The "events"

directory provides configuration templates for all documented

events, that can be used with perf tool. For example "xp_valid_flit"

is an equivalent of "type=0x8,event=0x4". Other parameters must be

explicitly specified. For events originating from device, "node"

defines its index. All crosspoint events require "xp" (index),

"port" (device port number) and "vc" (virtual channel ID) and

"dir" (direction). Watchpoints (special "event" value 0xfe) also

require comparator values ("cmp_l" and "cmp_h") and "mask", being

index of the comparator mask.



Masks are defined separately from the event description

(due to limited number of the config values) in the "cmp_mask"

directory, with first 8 configurable by user and additional

4 hardcoded for the most frequent use cases.



Cycle counter is described by a "type" value 0xff and does

not require any other settings.



Example of perf tool use:



/ # perf list | grep ccn

  ccn/cycles/                                        [Kernel PMU event]

<...>

  ccn/xp_valid_flit/                                 [Kernel PMU event]

<...>



/ # perf stat -C 0 -e ccn/cycles/,ccn/xp_valid_flit,xp=1,port=0,vc=1,dir=1/ \

                                                                       sleep 1



The driver does not support sampling, therefore "perf record" will

not work. Also notice that only single cpu is being selected

("-C 0") - this is because perf framework does not support

"non-CPU related" counters (yet?) so system-wide session ("-a")

would try (and in most cases fail) to set up the same event

per each CPU.

Documentation/devicetree/bindings/arm/ccn.txt

0 → 100644
+21 −0
Original line number Diff line number Diff line 
* ARM CCN (Cache Coherent Network)



Required properties:



- compatible: (standard compatible string) should be one of:

	"arm,ccn-504"

	"arm,ccn-508"



- reg: (standard registers property) physical address and size

	(16MB) of the configuration registers block



- interrupts: (standard interrupt property) single interrupt

	generated by the control block



Example:



	ccn@0x2000000000 {

		compatible = "arm,ccn-504";

		reg = <0x20 0x00000000 0 0x1000000>;

		interrupts = <0 181 4>;

	};

Documentation/devicetree/bindings/arm/spear-misc.txt

0 → 100644
+9 −0
Original line number Diff line number Diff line 
SPEAr Misc configuration

===========================

SPEAr SOCs have some miscellaneous registers which are used to configure

few properties of different peripheral controllers.



misc node required properties:



- compatible Should be	"st,spear1340-misc", "syscon".

- reg: Address range of misc space upto 8K

Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt

+27 −3
Original line number Diff line number Diff line
@@ -14,9 +14,6 @@ Required properties: 
- interrupt-names: Must include the following entries:

  "intr": The Tegra interrupt that is asserted for controller interrupts

  "msi": The Tegra interrupt that is asserted when an MSI is received

- pex-clk-supply: Supply voltage for internal reference clock

- vdd-supply: Power supply for controller (1.05V)

- avdd-supply: Power supply for controller (1.05V) (not required for Tegra20)

- bus-range: Range of bus numbers associated with this controller

- #address-cells: Address representation for root ports (must be 3)

  - cell 0 specifies the bus and device numbers of the root port:
@@ -60,6 +57,33 @@ Required properties: 
  - afi

  - pcie_x



Power supplies for Tegra20:

- avdd-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.

- vdd-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.

- avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must

  supply 1.05 V.

- avdd-plle-supply: Power supply for PLLE, which is shared with SATA. Must

  supply 1.05 V.

- vddio-pex-clk-supply: Power supply for PCIe clock. Must supply 3.3 V.



Power supplies for Tegra30:

- Required:

  - avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must

    supply 1.05 V.

  - avdd-plle-supply: Power supply for PLLE, which is shared with SATA. Must

    supply 1.05 V.

  - vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must

    supply 1.8 V.

  - hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.

    Must supply 3.3 V.

- Optional:

  - If lanes 0 to 3 are used:

    - avdd-pexa-supply: Power supply for analog PCIe logic. Must supply 1.05 V.

    - vdd-pexa-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.

  - If lanes 4 or 5 are used:

    - avdd-pexb-supply: Power supply for analog PCIe logic. Must supply 1.05 V.

    - vdd-pexb-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.



Root ports are defined as subnodes of the PCIe controller node.



Required properties:

Documentation/devicetree/bindings/pci/spear13xx-pcie.txt

0 → 100644
+14 −0
Original line number Diff line number Diff line 
SPEAr13XX PCIe DT detail:

================================



SPEAr13XX uses synopsis designware PCIe controller and ST MiPHY as phy

controller.



Required properties:

- compatible : should be "st,spear1340-pcie", "snps,dw-pcie".

- phys		    : phandle to phy node associated with pcie controller

- phy-names	    : must be "pcie-phy"

- All other definitions as per generic PCI bindings



 Optional properties:

- st,pcie-is-gen1 indicates that forced gen1 initialization is needed.