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Commit 0fbdad07 authored by Jacob Shin's avatar Jacob Shin Committed by Ingo Molnar
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perf/x86: Allow for architecture specific RDPMC indexes



Similar to config_base and event_base, allow architecture
specific RDPMC ECX values.

Signed-off-by: default avatarJacob Shin <jacob.shin@amd.com>
Acked-by: default avatarStephane Eranian <eranian@google.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1360171589-6381-6-git-send-email-jacob.shin@amd.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 4c1fd17a
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+1 −1
Original line number Diff line number Diff line
@@ -829,7 +829,7 @@ static inline void x86_assign_hw_event(struct perf_event *event,
	} else {
		hwc->config_base = x86_pmu_config_addr(hwc->idx);
		hwc->event_base  = x86_pmu_event_addr(hwc->idx);
		hwc->event_base_rdpmc = hwc->idx;
		hwc->event_base_rdpmc = x86_pmu_rdpmc_index(hwc->idx);
	}
}

+6 −0
Original line number Diff line number Diff line
@@ -326,6 +326,7 @@ struct x86_pmu {
	unsigned	eventsel;
	unsigned	perfctr;
	int		(*addr_offset)(int index, bool eventsel);
	int		(*rdpmc_index)(int index);
	u64		(*event_map)(int);
	int		max_events;
	int		num_counters;
@@ -459,6 +460,11 @@ static inline unsigned int x86_pmu_event_addr(int index)
				  x86_pmu.addr_offset(index, false) : index);
}

static inline int x86_pmu_rdpmc_index(int index)
{
	return x86_pmu.rdpmc_index ? x86_pmu.rdpmc_index(index) : index;
}

int x86_setup_perfctr(struct perf_event *event);

int x86_pmu_hw_config(struct perf_event *event);
+6 −0
Original line number Diff line number Diff line
@@ -173,6 +173,11 @@ static inline int amd_pmu_addr_offset(int index, bool eventsel)
	return offset;
}

static inline int amd_pmu_rdpmc_index(int index)
{
	return index;
}

static int amd_pmu_hw_config(struct perf_event *event)
{
	int ret;
@@ -620,6 +625,7 @@ static __initconst const struct x86_pmu amd_pmu = {
	.eventsel		= MSR_K7_EVNTSEL0,
	.perfctr		= MSR_K7_PERFCTR0,
	.addr_offset            = amd_pmu_addr_offset,
	.rdpmc_index		= amd_pmu_rdpmc_index,
	.event_map		= amd_pmu_event_map,
	.max_events		= ARRAY_SIZE(amd_perfmon_event_map),
	.num_counters		= AMD64_NUM_COUNTERS,