Commit 0f81bb6b authored Aug 26, 2011 by Will Deacon Committed by Russell King Aug 28, 2011

ARM: 7066/1: proc-v7: disable SCTLR.TE when disabling MMU



cpu_v7_reset disables the MMU and then branches to the provided address.
On Thumb-2 kernels, we should take care to clear the Thumb Exception
enable bit in the System Control Register, otherwise this may wreak
havok in the code to which we are branching (for example, an ARM kernel
image via kexec).

Reviewed-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

parent 552e0c8d

arch/arm/mm/proc-v7.S

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -66,6 +66,7 @@ ENDPROC(cpu_v7_proc_fin)
	ENTRY(cpu_v7_reset)		ENTRY(cpu_v7_reset)
	mrc p15, 0, r1, c1, c0, 0 @ ctrl register		mrc p15, 0, r1, c1, c0, 0 @ ctrl register
	bic r1, r1, #0x1 @ ...............m		bic r1, r1, #0x1 @ ...............m
			THUMB( bic r1, r1, #1 << 30 ) @ SCTLR.TE (Thumb exceptions)
	mcr p15, 0, r1, c1, c0, 0 @ disable MMU		mcr p15, 0, r1, c1, c0, 0 @ disable MMU
	isb		isb
	mov pc, r0		mov pc, r0