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Commit 0f5a8696 authored by Zhao Qiang's avatar Zhao Qiang Committed by Scott Wood
Browse files

Corenet: Add QE platform support for Corenet 



There is QE on platform T104x, add support.
Call funcs qe_ic_init and qe_init if CONFIG_QUICC_ENGINE is defined.

Signed-off-by: default avatarZhao Qiang <B45475@freescale.com>
[scottwood@freesacle.com: whitespace fix]
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
parent 706f4aa0

arch/powerpc/platforms/85xx/corenet_generic.c

+16 −0
Original line number Diff line number Diff line
@@ -26,11 +26,13 @@ 
#include <asm/udbg.h>

#include <asm/mpic.h>

#include <asm/ehv_pic.h>

#include <asm/qe_ic.h>



#include <linux/of_platform.h>

#include <sysdev/fsl_soc.h>

#include <sysdev/fsl_pci.h>

#include "smp.h"

#include "mpc85xx.h"



void __init corenet_gen_pic_init(void)

{
@@ -38,6 +40,8 @@ void __init corenet_gen_pic_init(void) 
	unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |

		MPIC_NO_RESET;



	struct device_node *np;



	if (ppc_md.get_irq == mpic_get_coreint_irq)

		flags |= MPIC_ENABLE_COREINT;
@@ -45,6 +49,13 @@ void __init corenet_gen_pic_init(void) 
	BUG_ON(mpic == NULL);



	mpic_init(mpic);



	np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");

	if (np) {

		qe_ic_init(np, 0, qe_ic_cascade_low_mpic,

				qe_ic_cascade_high_mpic);

		of_node_put(np);

	}

}



/*
@@ -57,6 +68,8 @@ void __init corenet_gen_setup_arch(void) 
	swiotlb_detect_4g();



	pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);



	mpc85xx_qe_init();

}



static const struct of_device_id of_device_ids[] = {
@@ -81,6 +94,9 @@ static const struct of_device_id of_device_ids[] = { 
	{

		.compatible	= "fsl,qoriq-pcie-v3.0",

	},

	{

		.compatible	= "fsl,qe",

	},

	/* The following two are for the Freescale hypervisor */

	{

		.name		= "hypervisor",