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Commit 0f06cde7 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
Browse files

ARM: mx28: Fix registers range 



Fix registers range.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Acked-by: default avatarMarek Vasut <marex@denx.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 640bf060

arch/arm/boot/dts/imx28.dtsi

+37 −37
Original line number Diff line number Diff line
@@ -57,18 +57,18 @@ 
			};



			hsadc@80002000 {

				reg = <0x80002000 2000>;

				reg = <0x80002000 0x2000>;

				interrupts = <13 87>;

				status = "disabled";

			};



			dma-apbh@80004000 {

				compatible = "fsl,imx28-dma-apbh";

				reg = <0x80004000 2000>;

				reg = <0x80004000 0x2000>;

			};



			perfmon@80006000 {

				reg = <0x80006000 800>;

				reg = <0x80006000 0x800>;

				interrupts = <27>;

				status = "disabled";

			};
@@ -77,7 +77,7 @@ 
				compatible = "fsl,imx28-gpmi-nand";

				#address-cells = <1>;

				#size-cells = <1>;

				reg = <0x8000c000 2000>, <0x8000a000 2000>;

				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;

				reg-names = "gpmi-nand", "bch";

				interrupts = <88>, <41>;

				interrupt-names = "gpmi-dma", "bch";
@@ -86,28 +86,28 @@ 
			};



			ssp0: ssp@80010000 {

				reg = <0x80010000 2000>;

				reg = <0x80010000 0x2000>;

				interrupts = <96 82>;

				fsl,ssp-dma-channel = <0>;

				status = "disabled";

			};



			ssp1: ssp@80012000 {

				reg = <0x80012000 2000>;

				reg = <0x80012000 0x2000>;

				interrupts = <97 83>;

				fsl,ssp-dma-channel = <1>;

				status = "disabled";

			};



			ssp2: ssp@80014000 {

				reg = <0x80014000 2000>;

				reg = <0x80014000 0x2000>;

				interrupts = <98 84>;

				fsl,ssp-dma-channel = <2>;

				status = "disabled";

			};



			ssp3: ssp@80016000 {

				reg = <0x80016000 2000>;

				reg = <0x80016000 0x2000>;

				interrupts = <99 85>;

				fsl,ssp-dma-channel = <3>;

				status = "disabled";
@@ -117,7 +117,7 @@ 
				#address-cells = <1>;

				#size-cells = <0>;

				compatible = "fsl,imx28-pinctrl", "simple-bus";

				reg = <0x80018000 2000>;

				reg = <0x80018000 0x2000>;



				gpio0: gpio@0 {

					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
@@ -510,96 +510,96 @@ 
			};



			digctl@8001c000 {

				reg = <0x8001c000 2000>;

				reg = <0x8001c000 0x2000>;

				interrupts = <89>;

				status = "disabled";

			};



			etm@80022000 {

				reg = <0x80022000 2000>;

				reg = <0x80022000 0x2000>;

				status = "disabled";

			};



			dma-apbx@80024000 {

				compatible = "fsl,imx28-dma-apbx";

				reg = <0x80024000 2000>;

				reg = <0x80024000 0x2000>;

			};



			dcp@80028000 {

				reg = <0x80028000 2000>;

				reg = <0x80028000 0x2000>;

				interrupts = <52 53 54>;

				status = "disabled";

			};



			pxp@8002a000 {

				reg = <0x8002a000 2000>;

				reg = <0x8002a000 0x2000>;

				interrupts = <39>;

				status = "disabled";

			};



			ocotp@8002c000 {

				reg = <0x8002c000 2000>;

				reg = <0x8002c000 0x2000>;

				status = "disabled";

			};



			axi-ahb@8002e000 {

				reg = <0x8002e000 2000>;

				reg = <0x8002e000 0x2000>;

				status = "disabled";

			};



			lcdif@80030000 {

				compatible = "fsl,imx28-lcdif";

				reg = <0x80030000 2000>;

				reg = <0x80030000 0x2000>;

				interrupts = <38 86>;

				status = "disabled";

			};



			can0: can@80032000 {

				compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";

				reg = <0x80032000 2000>;

				reg = <0x80032000 0x2000>;

				interrupts = <8>;

				status = "disabled";

			};



			can1: can@80034000 {

				compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";

				reg = <0x80034000 2000>;

				reg = <0x80034000 0x2000>;

				interrupts = <9>;

				status = "disabled";

			};



			simdbg@8003c000 {

				reg = <0x8003c000 200>;

				reg = <0x8003c000 0x200>;

				status = "disabled";

			};



			simgpmisel@8003c200 {

				reg = <0x8003c200 100>;

				reg = <0x8003c200 0x100>;

				status = "disabled";

			};



			simsspsel@8003c300 {

				reg = <0x8003c300 100>;

				reg = <0x8003c300 0x100>;

				status = "disabled";

			};



			simmemsel@8003c400 {

				reg = <0x8003c400 100>;

				reg = <0x8003c400 0x100>;

				status = "disabled";

			};



			gpiomon@8003c500 {

				reg = <0x8003c500 100>;

				reg = <0x8003c500 0x100>;

				status = "disabled";

			};



			simenet@8003c700 {

				reg = <0x8003c700 100>;

				reg = <0x8003c700 0x100>;

				status = "disabled";

			};



			armjtag@8003c800 {

				reg = <0x8003c800 100>;

				reg = <0x8003c800 0x100>;

				status = "disabled";

			};

                };
@@ -612,45 +612,45 @@ 
			ranges;



			clkctl@80040000 {

				reg = <0x80040000 2000>;

				reg = <0x80040000 0x2000>;

				status = "disabled";

			};



			saif0: saif@80042000 {

				compatible = "fsl,imx28-saif";

				reg = <0x80042000 2000>;

				reg = <0x80042000 0x2000>;

				interrupts = <59 80>;

				fsl,saif-dma-channel = <4>;

				status = "disabled";

			};



			power@80044000 {

				reg = <0x80044000 2000>;

				reg = <0x80044000 0x2000>;

				status = "disabled";

			};



			saif1: saif@80046000 {

				compatible = "fsl,imx28-saif";

				reg = <0x80046000 2000>;

				reg = <0x80046000 0x2000>;

				interrupts = <58 81>;

				fsl,saif-dma-channel = <5>;

				status = "disabled";

			};



			lradc@80050000 {

				reg = <0x80050000 2000>;

				reg = <0x80050000 0x2000>;

				status = "disabled";

			};



			spdif@80054000 {

				reg = <0x80054000 2000>;

				reg = <0x80054000 0x2000>;

				interrupts = <45 66>;

				status = "disabled";

			};



			rtc@80056000 {

				compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";

				reg = <0x80056000 2000>;

				reg = <0x80056000 0x2000>;

				interrupts = <29>;

			};
@@ -658,7 +658,7 @@ 
				#address-cells = <1>;

				#size-cells = <0>;

				compatible = "fsl,imx28-i2c";

				reg = <0x80058000 2000>;

				reg = <0x80058000 0x2000>;

				interrupts = <111 68>;

				clock-frequency = <100000>;

				status = "disabled";
@@ -668,7 +668,7 @@ 
				#address-cells = <1>;

				#size-cells = <0>;

				compatible = "fsl,imx28-i2c";

				reg = <0x8005a000 2000>;

				reg = <0x8005a000 0x2000>;

				interrupts = <110 69>;

				clock-frequency = <100000>;

				status = "disabled";
@@ -676,14 +676,14 @@ 


			pwm: pwm@80064000 {

				compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";

				reg = <0x80064000 2000>;

				reg = <0x80064000 0x2000>;

				#pwm-cells = <2>;

				fsl,pwm-number = <8>;

				status = "disabled";

			};



			timrot@80068000 {

				reg = <0x80068000 2000>;

				reg = <0x80068000 0x2000>;

				status = "disabled";

			};