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Commit 0ec0e74f authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: add a power state type based on power state flags 



The idea is to flag a power state with a certain type and use
that type to decide on what state to select.  On r6xx+, we
select a state and then transition between clock modes in that
state.  On pre-r6xx, we transition between states directly.

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 845db70d

drivers/gpu/drm/radeon/radeon.h

+9 −0
Original line number Diff line number Diff line
@@ -593,6 +593,14 @@ enum radeon_voltage_type { 
	VOLTAGE_SW

};



enum radeon_pm_state_type {

	POWER_STATE_TYPE_DEFAULT,

	POWER_STATE_TYPE_POWERSAVE,

	POWER_STATE_TYPE_BATTERY,

	POWER_STATE_TYPE_BALANCED,

	POWER_STATE_TYPE_PERFORMANCE,

};



struct radeon_voltage {

	enum radeon_voltage_type type;

	/* gpio voltage */
@@ -626,6 +634,7 @@ struct radeon_pm_clock_info { 
};



struct radeon_power_state {

	enum radeon_pm_state_type type;

	/* XXX: use a define for num clock modes */

	struct radeon_pm_clock_info clock_info[8];

	/* number of valid clock modes in this power state */

drivers/gpu/drm/radeon/radeon_atombios.c

+78 −0
Original line number Diff line number Diff line
@@ -1465,7 +1465,25 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) 
						rdev->pm.power_state[state_index].clock_info[0].voltage.vddc_id =

							power_info->info.asPowerPlayInfo[i].ucVoltageDropIndex;

					}

					/* order matters! */

					if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_POWERSAVE;

					if (misc & ATOM_PM_MISCINFO_DEFAULT_DC_STATE_ENTRY_TRUE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BATTERY;

					if (misc & ATOM_PM_MISCINFO_DEFAULT_LOW_DC_STATE_ENTRY_TRUE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BATTERY;

					if (misc & ATOM_PM_MISCINFO_LOAD_BALANCE_EN)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BALANCED;

					if (misc & ATOM_PM_MISCINFO_3D_ACCELERATION_EN)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_PERFORMANCE;

					if (misc & ATOM_PM_MISCINFO_DRIVER_DEFAULT_MODE) {

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_DEFAULT;

						rdev->pm.default_power_state = &rdev->pm.power_state[state_index];

						rdev->pm.current_power_state = &rdev->pm.power_state[state_index];

						rdev->pm.power_state[state_index].default_clock_mode =
@@ -1513,7 +1531,28 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) 
						rdev->pm.power_state[state_index].clock_info[0].voltage.vddc_id =

							power_info->info_2.asPowerPlayInfo[i].ucVoltageDropIndex;

					}

					/* order matters! */

					if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_POWERSAVE;

					if (misc & ATOM_PM_MISCINFO_DEFAULT_DC_STATE_ENTRY_TRUE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BATTERY;

					if (misc & ATOM_PM_MISCINFO_DEFAULT_LOW_DC_STATE_ENTRY_TRUE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BATTERY;

					if (misc & ATOM_PM_MISCINFO_LOAD_BALANCE_EN)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BALANCED;

					if (misc & ATOM_PM_MISCINFO_3D_ACCELERATION_EN)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_PERFORMANCE;

					if (misc2 & ATOM_PM_MISCINFO2_SYSTEM_AC_LITE_MODE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BALANCED;

					if (misc & ATOM_PM_MISCINFO_DRIVER_DEFAULT_MODE) {

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_DEFAULT;

						rdev->pm.default_power_state = &rdev->pm.power_state[state_index];

						rdev->pm.current_power_state = &rdev->pm.power_state[state_index];

						rdev->pm.power_state[state_index].default_clock_mode =
@@ -1567,7 +1606,28 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) 
							power_info->info_3.asPowerPlayInfo[i].ucVDDCI_VoltageDropIndex;

						}

					}

					/* order matters! */

					if (misc & ATOM_PM_MISCINFO_POWER_SAVING_MODE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_POWERSAVE;

					if (misc & ATOM_PM_MISCINFO_DEFAULT_DC_STATE_ENTRY_TRUE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BATTERY;

					if (misc & ATOM_PM_MISCINFO_DEFAULT_LOW_DC_STATE_ENTRY_TRUE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BATTERY;

					if (misc & ATOM_PM_MISCINFO_LOAD_BALANCE_EN)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BALANCED;

					if (misc & ATOM_PM_MISCINFO_3D_ACCELERATION_EN)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_PERFORMANCE;

					if (misc2 & ATOM_PM_MISCINFO2_SYSTEM_AC_LITE_MODE)

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BALANCED;

					if (misc & ATOM_PM_MISCINFO_DRIVER_DEFAULT_MODE) {

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_DEFAULT;

						rdev->pm.default_power_state = &rdev->pm.power_state[state_index];

						rdev->pm.current_power_state = &rdev->pm.power_state[state_index];

						rdev->pm.power_state[state_index].default_clock_mode =
@@ -1655,7 +1715,23 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) 
					rdev->pm.power_state[state_index].non_clock_info.pcie_lanes =

						((misc & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >>

						ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1;

					switch (misc2 & ATOM_PPLIB_CLASSIFICATION_UI_MASK) {

					case ATOM_PPLIB_CLASSIFICATION_UI_BATTERY:

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BATTERY;

						break;

					case ATOM_PPLIB_CLASSIFICATION_UI_BALANCED:

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_BALANCED;

						break;

					case ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE:

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_PERFORMANCE;

						break;

					}

					if (misc2 & ATOM_PPLIB_CLASSIFICATION_BOOT) {

						rdev->pm.power_state[state_index].type =

							POWER_STATE_TYPE_DEFAULT;

						rdev->pm.default_power_state = &rdev->pm.power_state[state_index];

						rdev->pm.current_power_state = &rdev->pm.power_state[state_index];

						rdev->pm.power_state[state_index].default_clock_mode =
@@ -1673,6 +1749,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) 


	if (rdev->pm.default_power_state == NULL) {

		/* add the default mode */

		rdev->pm.power_state[state_index].type =

			POWER_STATE_TYPE_DEFAULT;

		rdev->pm.power_state[state_index].num_clock_modes = 1;

		rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk;

		rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_combios.c

+4 −0
Original line number Diff line number Diff line
@@ -2406,6 +2406,8 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) 
			    (rdev->pm.power_state[state_index].clock_info[0].sclk >

			     rdev->clock.default_sclk))

				goto default_mode;

			rdev->pm.power_state[state_index].type =

				POWER_STATE_TYPE_BATTERY;

			misc = RBIOS16(offset + 0x5 + 0x0);

			if (rev > 4)

				misc2 = RBIOS16(offset + 0x5 + 0xe);
@@ -2467,6 +2469,8 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) 


default_mode:

	/* add the default mode */

	rdev->pm.power_state[state_index].type =

		POWER_STATE_TYPE_DEFAULT;

	rdev->pm.power_state[state_index].num_clock_modes = 1;

	rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk;

	rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;

drivers/gpu/drm/radeon/radeon_pm.c

+11 −1
Original line number Diff line number Diff line
@@ -40,6 +40,14 @@ static const char *pm_state_names[4] = { 
	"PM_STATE_ACTIVE"

};



static const char *pm_state_types[5] = {

	"Default",

	"Powersave",

	"Battery",

	"Balanced",

	"Performance",

};



static void radeon_print_power_mode_info(struct radeon_device *rdev)

{

	int i, j;
@@ -51,7 +59,9 @@ static void radeon_print_power_mode_info(struct radeon_device *rdev) 
			is_default = true;

		else

			is_default = false;

		DRM_INFO("State %d %s\n", i, is_default ? "(default)" : "");

		DRM_INFO("State %d %s %s\n", i,

			 pm_state_types[rdev->pm.power_state[i].type],

			 is_default ? "(default)" : "");

		if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))

			DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].non_clock_info.pcie_lanes);

		DRM_INFO("\t%d Clock Mode(s)\n", rdev->pm.power_state[i].num_clock_modes);