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Commit 0ddc1289 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/overlay: Ensure that the reg_bo is in the GTT prior to writing. 



Just makes sure that writes are not being aliased by the CPU cache and
do make it out to main memory.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=24977
Cc: stable@kernel.org
parent 6ba3ddd9

drivers/gpu/drm/i915/intel_overlay.c

+8 −0
Original line number Diff line number Diff line
@@ -1386,6 +1386,12 @@ void intel_setup_overlay(struct drm_device *dev) 
                        goto out_free_bo;

                }

		overlay->flip_addr = overlay->reg_bo->gtt_offset;



		ret = i915_gem_object_set_to_gtt_domain(reg_bo, true);

		if (ret) {

                        DRM_ERROR("failed to move overlay register bo into the GTT\n");

                        goto out_unpin_bo;

                }

	} else {

		ret = i915_gem_attach_phys_object(dev, reg_bo,

						  I915_GEM_PHYS_OVERLAY_REGS,
@@ -1418,6 +1424,8 @@ void intel_setup_overlay(struct drm_device *dev) 
	DRM_INFO("initialized overlay support\n");

	return;



out_unpin_bo:

	i915_gem_object_unpin(reg_bo);

out_free_bo:

	drm_gem_object_unreference(reg_bo);

out_free: