Commit 0d670b41 authored Jul 03, 2005 by Catalin Marinas Committed by Russell King Jul 03, 2005

[PATCH] ARM: 2784/1: Fix the block cache flush operation range



Patch from Catalin Marinas

The range for the ARMv6 block cache operations is inclusive but the
kernel doesn't re-calculate the end address, causing a page fault when
used (this only happens with support for cache aliasing, otherwise the
blk_flush_kern_dcache_page() is not called). This patch subtracts
L1_CACHE_BYTES from the end address.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

parent 75f631dc

arch/arm/mm/blockops.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -25,13 +25,14 @@ blk_flush_kern_dcache_page(void *kaddr)
		{
		asm(
		"add r1, r0, %0 \n\
		sub r1, r1, %1 \n\
		1: .word 0xec401f0e @ mcrr p15, 0, r0, r1, c14, 0 @ blocking \n\
		mov r0, #0 \n\
		mcr p15, 0, r0, c7, c5, 0 \n\
		mcr p15, 0, r0, c7, c10, 4 \n\
		mov pc, lr"
		:
		: "I" (PAGE_SIZE));
		: "I" (PAGE_SIZE), "I" (L1_CACHE_BYTES));
		}

		/*