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Commit 0d091850 authored by Hanna Hawa's avatar Hanna Hawa Committed by Greg Kroah-Hartman
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dmaengine: mv_xor_v2: enable XOR engine after its configuration 



commit ab2c5f0a77fe49bdb6e307b397496373cb47d2c2 upstream.

The engine was enabled prior to its configuration, which isn't
correct. This patch relocates the activation of the XOR engine, to be
after the configuration of the XOR engine.

Fixes: 19a340b1 ("dmaengine: mv_xor_v2: new driver")
Signed-off-by: default avatarHanna Hawa <hannah@marvell.com>
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e2a092ea

drivers/dma/mv_xor_v2.c

+3 −3
Original line number Diff line number Diff line
@@ -653,9 +653,6 @@ static int mv_xor_v2_descq_init(struct mv_xor_v2_device *xor_dev) 
	writel((xor_dev->hw_desq & 0xFFFF00000000) >> 32,

	       xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_BAHR_OFF);



	/* enable the DMA engine */

	writel(0, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_STOP_OFF);



	/*

	 * This is a temporary solution, until we activate the

	 * SMMU. Set the attributes for reading & writing data buffers
@@ -699,6 +696,9 @@ static int mv_xor_v2_descq_init(struct mv_xor_v2_device *xor_dev) 
	reg |= MV_XOR_V2_GLOB_PAUSE_AXI_TIME_DIS_VAL;

	writel(reg, xor_dev->glob_base + MV_XOR_V2_GLOB_PAUSE);



	/* enable the DMA engine */

	writel(0, xor_dev->dma_base + MV_XOR_V2_DMA_DESQ_STOP_OFF);



	return 0;

}