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Commit 0c21bcb6 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v4.2-next-soc' of https://github.com/mbgg/linux-mediatek into next/soc 

- ARM: mediatek: Add regmap to mediatek Kconfig
- soc: mediatek: Drop owner assignment from platform_driver
- soc: Mediatek: Add SCPSYS power domain driver
- dt-bindings: soc: Add documentation for the MediaTek SCPSYS unit
- soc: mediatek: Add infracfg misc driver support

* tag 'v4.2-next-soc' of https://github.com/mbgg/linux-mediatek

:
  ARM: mediatek: Add regmap to mediatek Kconfig
  soc: mediatek: Drop owner assignment from platform_driver
  soc: Mediatek: Add SCPSYS power domain driver
  dt-bindings: soc: Add documentation for the MediaTek SCPSYS unit
  soc: mediatek: Add infracfg misc driver support

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents a3ff83d2 3e0452d2

Documentation/devicetree/bindings/soc/mediatek/scpsys.txt

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MediaTek SCPSYS

===============



The System Control Processor System (SCPSYS) has several power management

related tasks in the system. The tasks include thermal measurement, dynamic

voltage frequency scaling (DVFS), interrupt filter and lowlevel sleep control.

The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power

domain control.



The driver implements the Generic PM domain bindings described in

power/power_domain.txt. It provides the power domains defined in

include/dt-bindings/power/mt8173-power.h.



Required properties:

- compatible: Must be "mediatek,mt8173-scpsys"

- #power-domain-cells: Must be 1

- reg: Address range of the SCPSYS unit

- infracfg: must contain a phandle to the infracfg controller

- clock, clock-names: clocks according to the common clock binding.

                      The clocks needed "mm" and "mfg". These are the

		      clocks which hardware needs to be enabled before

		      enabling certain power domains.



Example:



	scpsys: scpsys@10006000 {

		#power-domain-cells = <1>;

		compatible = "mediatek,mt8173-scpsys";

		reg = <0 0x10006000 0 0x1000>;

		infracfg = <&infracfg>;

		clocks = <&clk26m>,

			 <&topckgen CLK_TOP_MM_SEL>;

		clock-names = "mfg", "mm";

	};



Example consumer:



	afe: mt8173-afe-pcm@11220000 {

		compatible = "mediatek,mt8173-afe-pcm";

		power-domains = <&scpsys MT8173_POWER_DOMAIN_AUDIO>;

	};

arch/arm/mach-mediatek/Kconfig

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@@ -3,6 +3,7 @@ menuconfig ARCH_MEDIATEK 
	select ARM_GIC

	select PINCTRL

	select MTK_TIMER

	select MFD_SYSCON

	help

	  Support for Mediatek MT65xx & MT81xx SoCs

drivers/soc/mediatek/Kconfig

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#

# MediaTek SoC drivers

#

config MTK_INFRACFG

	bool "MediaTek INFRACFG Support"

	depends on ARCH_MEDIATEK || COMPILE_TEST

	select REGMAP

	help

	  Say yes here to add support for the MediaTek INFRACFG controller. The

	  INFRACFG controller contains various infrastructure registers not

	  directly associated to any device.



config MTK_PMIC_WRAP

	tristate "MediaTek PMIC Wrapper Support"

	depends on ARCH_MEDIATEK
@@ -10,3 +19,13 @@ config MTK_PMIC_WRAP 
	  Say yes here to add support for MediaTek PMIC Wrapper found

	  on different MediaTek SoCs. The PMIC wrapper is a proprietary

	  hardware to connect the PMIC.



config MTK_SCPSYS

	bool "MediaTek SCPSYS Support"

	depends on ARCH_MEDIATEK || COMPILE_TEST

	select REGMAP

	select MTK_INFRACFG

	select PM_GENERIC_DOMAINS if PM

	help

	  Say yes here to add support for the MediaTek SCPSYS power domain

	  driver.

drivers/soc/mediatek/Makefile

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obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o

obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o

obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o

drivers/soc/mediatek/mtk-infracfg.c

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/*

 * Copyright (c) 2015 Pengutronix, Sascha Hauer <kernel@pengutronix.de>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <linux/export.h>

#include <linux/jiffies.h>

#include <linux/regmap.h>

#include <linux/soc/mediatek/infracfg.h>

#include <asm/processor.h>



#define INFRA_TOPAXI_PROTECTEN		0x0220

#define INFRA_TOPAXI_PROTECTSTA1	0x0228



/**

 * mtk_infracfg_set_bus_protection - enable bus protection

 * @regmap: The infracfg regmap

 * @mask: The mask containing the protection bits to be enabled.

 *

 * This function enables the bus protection bits for disabled power

 * domains so that the system does not hang when some unit accesses the

 * bus while in power down.

 */

int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask)

{

	unsigned long expired;

	u32 val;

	int ret;



	regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, mask);



	expired = jiffies + HZ;



	while (1) {

		ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val);

		if (ret)

			return ret;



		if ((val & mask) == mask)

			break;



		cpu_relax();

		if (time_after(jiffies, expired))

			return -EIO;

	}



	return 0;

}



/**

 * mtk_infracfg_clear_bus_protection - disable bus protection

 * @regmap: The infracfg regmap

 * @mask: The mask containing the protection bits to be disabled.

 *

 * This function disables the bus protection bits previously enabled with

 * mtk_infracfg_set_bus_protection.

 */

int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask)

{

	unsigned long expired;

	int ret;



	regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0);



	expired = jiffies + HZ;



	while (1) {

		u32 val;



		ret = regmap_read(infracfg, INFRA_TOPAXI_PROTECTSTA1, &val);

		if (ret)

			return ret;



		if (!(val & mask))

			break;



		cpu_relax();

		if (time_after(jiffies, expired))

			return -EIO;

	}



	return 0;

}