Loading arch/m68k/include/asm/mcf_pgtable.h +2 −1 Original line number Diff line number Diff line Loading @@ -78,7 +78,8 @@ | CF_PAGE_READABLE \ | CF_PAGE_WRITABLE \ | CF_PAGE_EXEC \ | CF_PAGE_SYSTEM) | CF_PAGE_SYSTEM \ | CF_PAGE_SHARED) #define PAGE_COPY __pgprot(CF_PAGE_VALID \ | CF_PAGE_ACCESSED \ Loading arch/m68k/mm/mcfmmu.c +5 −4 Original line number Diff line number Diff line Loading @@ -87,7 +87,7 @@ void __init paging_init(void) int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) { unsigned long flags, mmuar; unsigned long flags, mmuar, mmutr; struct mm_struct *mm; pgd_t *pgd; pmd_t *pmd; Loading Loading @@ -137,9 +137,10 @@ int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) if (!pte_dirty(*pte) && !KMAPAREA(mmuar)) set_pte(pte, pte_wrprotect(*pte)); mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V); mmutr = (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | MMUTR_V; if ((mmuar < TASK_UNMAPPED_BASE) || (mmuar >= TASK_SIZE)) mmutr |= (pte->pte & CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT; mmu_write(MMUTR, mmutr); mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) | ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X); Loading arch/m68k/platform/coldfire/entry.S +1 −3 Original line number Diff line number Diff line Loading @@ -136,7 +136,7 @@ Luser_return: movel %sp,%d1 /* get thread_info pointer */ andl #-THREAD_SIZE,%d1 /* at base of kernel stack */ movel %d1,%a0 movel %a0@(TINFO_FLAGS),%d1 /* get thread_info->flags */ moveb %a0@(TINFO_FLAGS+3),%d1 /* thread_info->flags (low 8 bits) */ jne Lwork_to_do /* still work to do */ Lreturn: Loading @@ -148,8 +148,6 @@ Lwork_to_do: btst #TIF_NEED_RESCHED,%d1 jne reschedule /* GERG: do we need something here for TRACEing?? */ Lsignal_return: subql #4,%sp /* dummy return address */ SAVE_SWITCH_STACK Loading arch/powerpc/kernel/entry_32.S +1 −1 Original line number Diff line number Diff line Loading @@ -1213,7 +1213,7 @@ do_user_signal: /* r10 contains MSR_KERNEL here */ stw r3,_TRAP(r1) 2: addi r3,r1,STACK_FRAME_OVERHEAD mr r4,r9 bl do_signal bl do_notify_resume REST_NVGPRS(r1) b recheck Loading arch/powerpc/kernel/entry_64.S +5 −1 Original line number Diff line number Diff line Loading @@ -751,12 +751,16 @@ user_work: andi. r0,r4,_TIF_NEED_RESCHED beq 1f li r5,1 TRACE_AND_RESTORE_IRQ(r5); bl .schedule b .ret_from_except_lite 1: bl .save_nvgprs li r5,1 TRACE_AND_RESTORE_IRQ(r5); addi r3,r1,STACK_FRAME_OVERHEAD bl .do_signal bl .do_notify_resume b .ret_from_except unrecov_restore: Loading Loading
arch/m68k/include/asm/mcf_pgtable.h +2 −1 Original line number Diff line number Diff line Loading @@ -78,7 +78,8 @@ | CF_PAGE_READABLE \ | CF_PAGE_WRITABLE \ | CF_PAGE_EXEC \ | CF_PAGE_SYSTEM) | CF_PAGE_SYSTEM \ | CF_PAGE_SHARED) #define PAGE_COPY __pgprot(CF_PAGE_VALID \ | CF_PAGE_ACCESSED \ Loading
arch/m68k/mm/mcfmmu.c +5 −4 Original line number Diff line number Diff line Loading @@ -87,7 +87,7 @@ void __init paging_init(void) int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) { unsigned long flags, mmuar; unsigned long flags, mmuar, mmutr; struct mm_struct *mm; pgd_t *pgd; pmd_t *pmd; Loading Loading @@ -137,9 +137,10 @@ int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) if (!pte_dirty(*pte) && !KMAPAREA(mmuar)) set_pte(pte, pte_wrprotect(*pte)); mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V); mmutr = (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | MMUTR_V; if ((mmuar < TASK_UNMAPPED_BASE) || (mmuar >= TASK_SIZE)) mmutr |= (pte->pte & CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT; mmu_write(MMUTR, mmutr); mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) | ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X); Loading
arch/m68k/platform/coldfire/entry.S +1 −3 Original line number Diff line number Diff line Loading @@ -136,7 +136,7 @@ Luser_return: movel %sp,%d1 /* get thread_info pointer */ andl #-THREAD_SIZE,%d1 /* at base of kernel stack */ movel %d1,%a0 movel %a0@(TINFO_FLAGS),%d1 /* get thread_info->flags */ moveb %a0@(TINFO_FLAGS+3),%d1 /* thread_info->flags (low 8 bits) */ jne Lwork_to_do /* still work to do */ Lreturn: Loading @@ -148,8 +148,6 @@ Lwork_to_do: btst #TIF_NEED_RESCHED,%d1 jne reschedule /* GERG: do we need something here for TRACEing?? */ Lsignal_return: subql #4,%sp /* dummy return address */ SAVE_SWITCH_STACK Loading
arch/powerpc/kernel/entry_32.S +1 −1 Original line number Diff line number Diff line Loading @@ -1213,7 +1213,7 @@ do_user_signal: /* r10 contains MSR_KERNEL here */ stw r3,_TRAP(r1) 2: addi r3,r1,STACK_FRAME_OVERHEAD mr r4,r9 bl do_signal bl do_notify_resume REST_NVGPRS(r1) b recheck Loading
arch/powerpc/kernel/entry_64.S +5 −1 Original line number Diff line number Diff line Loading @@ -751,12 +751,16 @@ user_work: andi. r0,r4,_TIF_NEED_RESCHED beq 1f li r5,1 TRACE_AND_RESTORE_IRQ(r5); bl .schedule b .ret_from_except_lite 1: bl .save_nvgprs li r5,1 TRACE_AND_RESTORE_IRQ(r5); addi r3,r1,STACK_FRAME_OVERHEAD bl .do_signal bl .do_notify_resume b .ret_from_except unrecov_restore: Loading