Merge "drm/msm: Support different SMMU backends for address spaces" (0adba352) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/drm/msm/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -166,6 +166,7 @@ msm_drm-$(CONFIG_DRM_MSM) += \
		msm_gem_prime.o \
		msm_gem_submit.o \
		msm_gem_shrinker.o \
		msm_gem_vma.o \
		msm_gpu.o \
		msm_iommu.o \
		msm_smmu.o \

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -583,7 +583,7 @@ struct msm_gpu a3xx_gpu_init(struct drm_device dev)
		#endif
		}

		if (!gpu->mmu) {
		if (!gpu->aspace) {
		/* TODO we think it is possible to configure the GPU to
		* restrict access to VRAM carveout. But the required
		* registers are unknown. For now just bail out and

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -672,7 +672,7 @@ struct msm_gpu a4xx_gpu_init(struct drm_device dev)
		#endif
		}

		if (!gpu->mmu) {
		if (!gpu->aspace) {
		/* TODO we think it is possible to configure the GPU to
		* restrict access to VRAM carveout. But the required
		* registers are unknown. For now just bail out and

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -381,7 +381,7 @@ int adreno_gpu_init(struct drm_device drm, struct platform_device pdev,
		return ret;
		}

		mmu = gpu->mmu;
		mmu = gpu->aspace->mmu;
		if (mmu) {
		ret = mmu->funcs->attach(mmu, iommu_ports,
		ARRAY_SIZE(iommu_ports));

drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c

+50 −8

Original line number	Diff line number	Diff line
		@@ -17,6 +17,7 @@


		#include "msm_drv.h"
		#include "msm_gem.h"
		#include "msm_mmu.h"
		#include "mdp4_kms.h"

		@@ -151,12 +152,28 @@ static long mdp4_round_pixclk(struct msm_kms *kms, unsigned long rate,
		}
		}

		static const char * const iommu_ports[] = {
		"mdp_port0_cb0", "mdp_port1_cb0",
		};
		static void mdp4_preclose(struct msm_kms kms, struct drm_file file)
		{
		struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
		struct msm_drm_private *priv = mdp4_kms->dev->dev_private;
		unsigned int i;
		struct msm_gem_address_space *aspace = mdp4_kms->aspace;

		for (i = 0; i < priv->num_crtcs; i++)
		mdp4_crtc_cancel_pending_flip(priv->crtcs[i], file);

		if (aspace) {
		aspace->mmu->funcs->detach(aspace->mmu,
		iommu_ports, ARRAY_SIZE(iommu_ports));
		msm_gem_address_space_destroy(aspace);
		}
		}

		static void mdp4_destroy(struct msm_kms *kms)
		{
		struct device *dev = mdp4_kms->dev->dev;
		struct msm_gem_address_space *aspace = mdp4_kms->aspace;

		struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
		struct device *dev = mdp4_kms->dev->dev;
		struct msm_mmu *mmu = mdp4_kms->mmu;
		@@ -173,6 +190,12 @@ static void mdp4_destroy(struct msm_kms *kms)
		if (mdp4_kms->rpm_enabled)
		pm_runtime_disable(dev);

		if (aspace) {
		aspace->mmu->funcs->detach(aspace->mmu,
		iommu_ports, ARRAY_SIZE(iommu_ports));
		msm_gem_address_space_destroy(aspace);
		}

		kfree(mdp4_kms);
		}

		@@ -440,8 +463,8 @@ struct msm_kms mdp4_kms_init(struct drm_device dev)
		struct mdp4_platform_config *config = mdp4_get_config(pdev);
		struct mdp4_kms *mdp4_kms;
		struct msm_kms *kms = NULL;
		struct msm_mmu *mmu;
		int irq, ret;
		struct msm_gem_address_space *aspace;

		mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
		if (!mdp4_kms) {
		@@ -531,12 +554,23 @@ struct msm_kms mdp4_kms_init(struct drm_device dev)
		mdelay(16);

		if (config->iommu) {
		mmu = msm_iommu_new(&pdev->dev, config->iommu);
		struct msm_mmu *mmu = msm_iommu_new(&pdev->dev, config->iommu);

		if (IS_ERR(mmu)) {
		ret = PTR_ERR(mmu);
		goto fail;
		}
		ret = mmu->funcs->attach(mmu, iommu_ports,

		aspace = msm_gem_address_space_create(&pdev->dev,
		mmu, "mdp4", 0x1000, 0xffffffff);
		if (IS_ERR(aspace)) {
		ret = PTR_ERR(aspace);
		goto fail;
		}

		mdp4_kms->aspace = aspace;

		ret = aspace->mmu->funcs->attach(aspace->mmu, iommu_ports,
		ARRAY_SIZE(iommu_ports));
		if (ret)
		goto fail;
		@@ -545,10 +579,10 @@ struct msm_kms mdp4_kms_init(struct drm_device dev)
		} else {
		dev_info(dev->dev, "no iommu, fallback to phys "
		"contig buffers for scanout\n");
		mmu = NULL;
		aspace = NULL;
		}

		mdp4_kms->id = msm_register_mmu(dev, mmu);
		mdp4_kms->id = msm_register_address_space(dev, aspace);
		if (mdp4_kms->id < 0) {
		ret = mdp4_kms->id;
		dev_err(dev->dev, "failed to register mdp4 iommu: %d\n", ret);
		@@ -599,5 +633,13 @@ static struct mdp4_platform_config mdp4_get_config(struct platform_device dev)
		config.max_clk = 266667000;
		config.iommu = iommu_domain_alloc(&platform_bus_type);

		#else
		if (cpu_is_apq8064())
		config.max_clk = 266667000;
		else
		config.max_clk = 200000000;

		config.iommu = msm_get_iommu_domain(DISPLAY_READ_DOMAIN);
		#endif
		return &config;
		}