Loading drivers/gpu/drm/nouveau/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ nouveau-y += core/subdev/bios/init.o nouveau-y += core/subdev/bios/mxm.o nouveau-y += core/subdev/bios/perf.o nouveau-y += core/subdev/bios/pll.o nouveau-y += core/subdev/bios/ramcfg.o nouveau-y += core/subdev/bios/rammap.o nouveau-y += core/subdev/bios/timing.o nouveau-y += core/subdev/bios/therm.o Loading drivers/gpu/drm/nouveau/core/include/subdev/bios/ramcfg.h 0 → 100644 +9 −0 Original line number Diff line number Diff line #ifndef __NVBIOS_RAMCFG_H__ #define __NVBIOS_RAMCFG_H__ struct nouveau_bios; u8 nvbios_ramcfg_count(struct nouveau_bios *); u8 nvbios_ramcfg_index(struct nouveau_bios *); #endif drivers/gpu/drm/nouveau/core/subdev/bios/init.c +5 −43 Original line number Diff line number Diff line Loading @@ -9,6 +9,7 @@ #include <subdev/bios/dp.h> #include <subdev/bios/gpio.h> #include <subdev/bios/init.h> #include <subdev/bios/ramcfg.h> #include <subdev/devinit.h> #include <subdev/i2c.h> #include <subdev/vga.h> Loading Loading @@ -391,43 +392,14 @@ init_unknown_script(struct nouveau_bios *bios) return 0x0000; } static u16 init_ram_restrict_table(struct nvbios_init *init) { struct nouveau_bios *bios = init->bios; struct bit_entry bit_M; u16 data = 0x0000; if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 1 && bit_M.length >= 5) data = nv_ro16(bios, bit_M.offset + 3); if (bit_M.version == 2 && bit_M.length >= 3) data = nv_ro16(bios, bit_M.offset + 1); } if (data == 0x0000) warn("ram restrict table not found\n"); return data; } static u8 init_ram_restrict_group_count(struct nvbios_init *init) { struct nouveau_bios *bios = init->bios; struct bit_entry bit_M; if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 1 && bit_M.length >= 5) return nv_ro08(bios, bit_M.offset + 2); if (bit_M.version == 2 && bit_M.length >= 3) return nv_ro08(bios, bit_M.offset + 0); } return 0x00; return nvbios_ramcfg_count(init->bios); } static u8 init_ram_restrict_strap(struct nvbios_init *init) init_ram_restrict(struct nvbios_init *init) { /* This appears to be the behaviour of the VBIOS parser, and *is* * important to cache the NV_PEXTDEV_BOOT0 on later chipsets to Loading @@ -438,18 +410,8 @@ init_ram_restrict_strap(struct nvbios_init *init) * in case *not* re-reading the strap causes similar breakage. */ if (!init->ramcfg || init->bios->version.major < 0x70) init->ramcfg = init_rd32(init, 0x101000); return (init->ramcfg & 0x00000003c) >> 2; } static u8 init_ram_restrict(struct nvbios_init *init) { u8 strap = init_ram_restrict_strap(init); u16 table = init_ram_restrict_table(init); if (table) return nv_ro08(init->bios, table + strap); return 0x00; init->ramcfg = 0x80000000 | nvbios_ramcfg_index(init->bios); return (init->ramcfg & 0x7fffffff); } static u8 Loading drivers/gpu/drm/nouveau/core/subdev/bios/ramcfg.c 0 → 100644 +67 −0 Original line number Diff line number Diff line /* * Copyright 2013 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs <bskeggs@redhat.com> */ #include <subdev/bios.h> #include <subdev/bios/bit.h> #include <subdev/bios/ramcfg.h> static u8 nvbios_ramcfg_strap(struct nouveau_bios *bios) { return (nv_rd32(bios, 0x101000) & 0x0000003c) >> 2; } u8 nvbios_ramcfg_count(struct nouveau_bios *bios) { struct bit_entry bit_M; if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 1 && bit_M.length >= 5) return nv_ro08(bios, bit_M.offset + 2); if (bit_M.version == 2 && bit_M.length >= 3) return nv_ro08(bios, bit_M.offset + 0); } return 0x00; } u8 nvbios_ramcfg_index(struct nouveau_bios *bios) { u8 strap = nvbios_ramcfg_strap(bios); u32 xlat = 0x00000000; struct bit_entry bit_M; if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 1 && bit_M.length >= 5) xlat = nv_ro16(bios, bit_M.offset + 3); if (bit_M.version == 2 && bit_M.length >= 3) xlat = nv_ro16(bios, bit_M.offset + 1); } if (xlat) strap = nv_ro08(bios, xlat + strap); return strap; } drivers/gpu/drm/nouveau/core/subdev/fb/ramnv50.c +1 −12 Original line number Diff line number Diff line Loading @@ -70,13 +70,11 @@ nv50_ram_calc(struct nouveau_fb *pfb, u32 freq) struct nv50_ramseq *hwsq = &ram->hwsq; struct nvbios_perfE perfE; struct nvbios_pll mpll; struct bit_entry M; struct { u32 data; u8 size; } ramcfg, timing; u8 ver, hdr, cnt, strap; u32 data; int N1, M1, N2, M2, P; int ret, i; Loading @@ -93,16 +91,7 @@ nv50_ram_calc(struct nouveau_fb *pfb, u32 freq) } while (perfE.memory < freq); /* locate specific data set for the attached memory */ if (bit_entry(bios, 'M', &M) || M.version != 1 || M.length < 5) { nv_error(pfb, "invalid/missing memory table\n"); return -EINVAL; } strap = (nv_rd32(pfb, 0x101000) & 0x0000003c) >> 2; data = nv_ro16(bios, M.offset + 3); if (data) strap = nv_ro08(bios, data + strap); strap = nvbios_ramcfg_index(bios); if (strap >= cnt) { nv_error(pfb, "invalid ramcfg strap\n"); return -EINVAL; Loading Loading
drivers/gpu/drm/nouveau/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ nouveau-y += core/subdev/bios/init.o nouveau-y += core/subdev/bios/mxm.o nouveau-y += core/subdev/bios/perf.o nouveau-y += core/subdev/bios/pll.o nouveau-y += core/subdev/bios/ramcfg.o nouveau-y += core/subdev/bios/rammap.o nouveau-y += core/subdev/bios/timing.o nouveau-y += core/subdev/bios/therm.o Loading
drivers/gpu/drm/nouveau/core/include/subdev/bios/ramcfg.h 0 → 100644 +9 −0 Original line number Diff line number Diff line #ifndef __NVBIOS_RAMCFG_H__ #define __NVBIOS_RAMCFG_H__ struct nouveau_bios; u8 nvbios_ramcfg_count(struct nouveau_bios *); u8 nvbios_ramcfg_index(struct nouveau_bios *); #endif
drivers/gpu/drm/nouveau/core/subdev/bios/init.c +5 −43 Original line number Diff line number Diff line Loading @@ -9,6 +9,7 @@ #include <subdev/bios/dp.h> #include <subdev/bios/gpio.h> #include <subdev/bios/init.h> #include <subdev/bios/ramcfg.h> #include <subdev/devinit.h> #include <subdev/i2c.h> #include <subdev/vga.h> Loading Loading @@ -391,43 +392,14 @@ init_unknown_script(struct nouveau_bios *bios) return 0x0000; } static u16 init_ram_restrict_table(struct nvbios_init *init) { struct nouveau_bios *bios = init->bios; struct bit_entry bit_M; u16 data = 0x0000; if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 1 && bit_M.length >= 5) data = nv_ro16(bios, bit_M.offset + 3); if (bit_M.version == 2 && bit_M.length >= 3) data = nv_ro16(bios, bit_M.offset + 1); } if (data == 0x0000) warn("ram restrict table not found\n"); return data; } static u8 init_ram_restrict_group_count(struct nvbios_init *init) { struct nouveau_bios *bios = init->bios; struct bit_entry bit_M; if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 1 && bit_M.length >= 5) return nv_ro08(bios, bit_M.offset + 2); if (bit_M.version == 2 && bit_M.length >= 3) return nv_ro08(bios, bit_M.offset + 0); } return 0x00; return nvbios_ramcfg_count(init->bios); } static u8 init_ram_restrict_strap(struct nvbios_init *init) init_ram_restrict(struct nvbios_init *init) { /* This appears to be the behaviour of the VBIOS parser, and *is* * important to cache the NV_PEXTDEV_BOOT0 on later chipsets to Loading @@ -438,18 +410,8 @@ init_ram_restrict_strap(struct nvbios_init *init) * in case *not* re-reading the strap causes similar breakage. */ if (!init->ramcfg || init->bios->version.major < 0x70) init->ramcfg = init_rd32(init, 0x101000); return (init->ramcfg & 0x00000003c) >> 2; } static u8 init_ram_restrict(struct nvbios_init *init) { u8 strap = init_ram_restrict_strap(init); u16 table = init_ram_restrict_table(init); if (table) return nv_ro08(init->bios, table + strap); return 0x00; init->ramcfg = 0x80000000 | nvbios_ramcfg_index(init->bios); return (init->ramcfg & 0x7fffffff); } static u8 Loading
drivers/gpu/drm/nouveau/core/subdev/bios/ramcfg.c 0 → 100644 +67 −0 Original line number Diff line number Diff line /* * Copyright 2013 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Ben Skeggs <bskeggs@redhat.com> */ #include <subdev/bios.h> #include <subdev/bios/bit.h> #include <subdev/bios/ramcfg.h> static u8 nvbios_ramcfg_strap(struct nouveau_bios *bios) { return (nv_rd32(bios, 0x101000) & 0x0000003c) >> 2; } u8 nvbios_ramcfg_count(struct nouveau_bios *bios) { struct bit_entry bit_M; if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 1 && bit_M.length >= 5) return nv_ro08(bios, bit_M.offset + 2); if (bit_M.version == 2 && bit_M.length >= 3) return nv_ro08(bios, bit_M.offset + 0); } return 0x00; } u8 nvbios_ramcfg_index(struct nouveau_bios *bios) { u8 strap = nvbios_ramcfg_strap(bios); u32 xlat = 0x00000000; struct bit_entry bit_M; if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 1 && bit_M.length >= 5) xlat = nv_ro16(bios, bit_M.offset + 3); if (bit_M.version == 2 && bit_M.length >= 3) xlat = nv_ro16(bios, bit_M.offset + 1); } if (xlat) strap = nv_ro08(bios, xlat + strap); return strap; }
drivers/gpu/drm/nouveau/core/subdev/fb/ramnv50.c +1 −12 Original line number Diff line number Diff line Loading @@ -70,13 +70,11 @@ nv50_ram_calc(struct nouveau_fb *pfb, u32 freq) struct nv50_ramseq *hwsq = &ram->hwsq; struct nvbios_perfE perfE; struct nvbios_pll mpll; struct bit_entry M; struct { u32 data; u8 size; } ramcfg, timing; u8 ver, hdr, cnt, strap; u32 data; int N1, M1, N2, M2, P; int ret, i; Loading @@ -93,16 +91,7 @@ nv50_ram_calc(struct nouveau_fb *pfb, u32 freq) } while (perfE.memory < freq); /* locate specific data set for the attached memory */ if (bit_entry(bios, 'M', &M) || M.version != 1 || M.length < 5) { nv_error(pfb, "invalid/missing memory table\n"); return -EINVAL; } strap = (nv_rd32(pfb, 0x101000) & 0x0000003c) >> 2; data = nv_ro16(bios, M.offset + 3); if (data) strap = nv_ro08(bios, data + strap); strap = nvbios_ramcfg_index(bios); if (strap >= cnt) { nv_error(pfb, "invalid ramcfg strap\n"); return -EINVAL; Loading