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Commit 09ece8b9 authored by Hariprasad S's avatar Hariprasad S Committed by Doug Ledford
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iw_cxgb4: use BAR2 GTS register for T5 kernel mode CQs 



For T5, we must not use the kdb/kgts registers, in order avoid db drops
under extreme loads.

Signed-off-by: default avatarSteve Wise <swise@opengridcomputing.com>
Signed-off-by: default avatarHariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent 6198dd8d

drivers/infiniband/hw/cxgb4/cq.c

+11 −4
Original line number Diff line number Diff line
@@ -156,12 +156,19 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, 
		goto err4;



	cq->gen = 1;

	cq->gts = rdev->lldi.gts_reg;

	cq->rdev = rdev;

	if (user) {

		cq->ugts = (u64)pci_resource_start(rdev->lldi.pdev, 2) +

					(cq->cqid << rdev->cqshift);

		cq->ugts &= PAGE_MASK;

		u32 off = (cq->cqid << rdev->cqshift) & PAGE_MASK;



		cq->ugts = (u64)rdev->bar2_pa + off;

	} else if (is_t4(rdev->lldi.adapter_type)) {

		cq->gts = rdev->lldi.gts_reg;

		cq->qid_mask = -1U;

	} else {

		u32 off = ((cq->cqid << rdev->cqshift) & PAGE_MASK) + 12;



		cq->gts = rdev->bar2_kva + off;

		cq->qid_mask = rdev->qpmask;

	}

	return 0;

err4:

drivers/infiniband/hw/cxgb4/t4.h

+4 −3
Original line number Diff line number Diff line
@@ -539,6 +539,7 @@ struct t4_cq { 
	size_t memsize;

	__be64 bits_type_ts;

	u32 cqid;

	u32 qid_mask;

	int vector;

	u16 size; /* including status page */

	u16 cidx;
@@ -563,12 +564,12 @@ static inline int t4_arm_cq(struct t4_cq *cq, int se) 
	set_bit(CQ_ARMED, &cq->flags);

	while (cq->cidx_inc > CIDXINC_M) {

		val = SEINTARM_V(0) | CIDXINC_V(CIDXINC_M) | TIMERREG_V(7) |

		      INGRESSQID_V(cq->cqid);

		      INGRESSQID_V(cq->cqid & cq->qid_mask);

		writel(val, cq->gts);

		cq->cidx_inc -= CIDXINC_M;

	}

	val = SEINTARM_V(se) | CIDXINC_V(cq->cidx_inc) | TIMERREG_V(6) |

	      INGRESSQID_V(cq->cqid);

	      INGRESSQID_V(cq->cqid & cq->qid_mask);

	writel(val, cq->gts);

	cq->cidx_inc = 0;

	return 0;
@@ -601,7 +602,7 @@ static inline void t4_hwcq_consume(struct t4_cq *cq) 
		u32 val;



		val = SEINTARM_V(0) | CIDXINC_V(cq->cidx_inc) | TIMERREG_V(7) |

		      INGRESSQID_V(cq->cqid);

		      INGRESSQID_V(cq->cqid & cq->qid_mask);

		writel(val, cq->gts);

		cq->cidx_inc = 0;

	}