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Commit 091be550 authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
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MIPS: clear MSACSR cause bits when handling MSA FP exception 



Much like for traditional scalar FP exceptions, the cause bits in the
MSACSR register need to be cleared following an MSA FP exception.
Without doing so the exception will simply be raised again whenever
the kernel restores MSACSR from a tasks saved context, leading to
undesirable spurious exceptions. Clear the cause bits from the
handle_msa_fpe function, mirroring the way handle_fpe clears the
cause bits in FCSR.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9164/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e1bebbab

arch/mips/kernel/genex.S

+10 −1
Original line number Diff line number Diff line
@@ -368,6 +368,15 @@ NESTED(nmi_handler, PT_SIZE, sp) 
	STI

	.endm



	.macro	__build_clear_msa_fpe

	_cfcmsa	a1, MSA_CSR

	li	a2, ~(0x3f << 12)

	and	a1, a1, a2

	_ctcmsa	MSA_CSR, a1

	TRACE_IRQS_ON

	STI

	.endm



	.macro	__build_clear_ade

	MFC0	t0, CP0_BADVADDR

	PTR_S	t0, PT_BVADDR(sp)
@@ -426,7 +435,7 @@ NESTED(nmi_handler, PT_SIZE, sp) 
	BUILD_HANDLER cpu cpu sti silent		/* #11 */

	BUILD_HANDLER ov ov sti silent			/* #12 */

	BUILD_HANDLER tr tr sti silent			/* #13 */

	BUILD_HANDLER msa_fpe msa_fpe sti silent	/* #14 */

	BUILD_HANDLER msa_fpe msa_fpe msa_fpe silent	/* #14 */

	BUILD_HANDLER fpe fpe fpe silent		/* #15 */

	BUILD_HANDLER ftlb ftlb none silent		/* #16 */

	BUILD_HANDLER msa msa sti silent		/* #21 */