Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 08086635 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: cleanup UVD coding style 



Cleanup 80 chars limit.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarAlexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e5223214

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

+3 −4
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ 
#include "uvd/uvd_4_2_d.h"



/* 1 second timeout */

#define UVD_IDLE_TIMEOUT_MS	1000

#define UVD_IDLE_TIMEOUT	msecs_to_jiffies(1000)

/* Polaris10/11 firmware version */

#define FW_1_66_16 ((1 << 24) | (66 << 16) | (16 << 8))
@@ -1110,8 +1110,7 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work) 
			amdgpu_asic_set_uvd_clocks(adev, 0, 0);

		}

	} else {

		schedule_delayed_work(&adev->uvd.idle_work,

				      msecs_to_jiffies(UVD_IDLE_TIMEOUT_MS));

		schedule_delayed_work(&adev->uvd.idle_work, UVD_IDLE_TIMEOUT);

	}

}
@@ -1119,7 +1118,7 @@ static void amdgpu_uvd_note_usage(struct amdgpu_device *adev) 
{

	bool set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work);

	set_clocks &= schedule_delayed_work(&adev->uvd.idle_work,

					    msecs_to_jiffies(UVD_IDLE_TIMEOUT_MS));

					    UVD_IDLE_TIMEOUT);



	if (set_clocks) {

		if (adev->pm.dpm_enabled) {