Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 06d278c5 authored by Arend van Spriel's avatar Arend van Spriel Committed by Greg Kroah-Hartman
Browse files

staging: brcm80211: remove usage of struct osl_info to access device



For accessing the PCI or SDIO device in the driver the device is stored
in a separate structure osl_info. To get rid of the osl concept the use
of this device pointer attribute is removed from the drivers.

Reviewed-by: default avatarRoland Vossen <rvossen@broadcom.com>
Reviewed-by: default avatarBrett Rudley <brudley@broadcom.com>
Signed-off-by: default avatarArend van Spriel <arend@broadcom.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 7c0e45d7
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -442,7 +442,7 @@ void write_phy_reg(phy_info_t *pi, u16 addr, u16 val)
	if (addr == 0x72)
		(void)R_REG(osh, &regs->phyregdata);
#else
	W_REG(osh, (volatile u32 *)(&regs->phyregaddr),
	W_REG(osh, (u32 *)(&regs->phyregaddr),
	      addr | (val << 16));
	if (pi->sh->bustype == PCI_BUS) {
		if (++pi->phy_wreg >= pi->phy_wreg_limit) {
+2 −2
Original line number Diff line number Diff line
@@ -45,7 +45,7 @@
#else
struct sbpcieregs;

extern u8 pcicore_find_pci_capability(struct osl_info *osh, u8 req_cap_id,
extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id,
					 unsigned char *buf, u32 *buflen);
extern uint pcie_readreg(struct osl_info *osh, struct sbpcieregs *pcieregs,
			 uint addrtype, uint offset);
@@ -70,7 +70,7 @@ extern u32 pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset,
extern u32 pcicore_pciereg(void *pch, u32 offset, u32 mask,
			      u32 val, uint type);

extern bool pcicore_pmecap_fast(struct osl_info *osh);
extern bool pcicore_pmecap_fast(void *pch);
extern void pcicore_pmeen(void *pch);
extern void pcicore_pmeclr(void *pch);
extern bool pcicore_pmestat(void *pch);
+9 −12
Original line number Diff line number Diff line
@@ -66,14 +66,11 @@ extern uint osl_pci_slot(struct osl_info *osh);
#endif

#if defined(BCMSDIO)
#define SELECT_BUS_WRITE(osh, mmap_op, bus_op) \
	if ((osh)->mmbus) \
		mmap_op else bus_op
#define SELECT_BUS_READ(osh, mmap_op, bus_op) \
	((osh)->mmbus) ?  mmap_op : bus_op
#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op
#define SELECT_BUS_READ(mmap_op, bus_op) bus_op
#else
#define SELECT_BUS_WRITE(osh, mmap_op, bus_op) mmap_op
#define SELECT_BUS_READ(osh, mmap_op, bus_op) mmap_op
#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op
#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op
#endif

/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
@@ -89,14 +86,14 @@ extern uint osl_pci_slot(struct osl_info *osh);
#ifndef IL_BIGENDIAN
#ifndef __mips__
#define R_REG(osh, r) (\
	SELECT_BUS_READ(osh, sizeof(*(r)) == sizeof(u8) ? \
	SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \
	readb((volatile u8*)(r)) : \
	sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \
	readl((volatile u32*)(r)), OSL_READ_REG(osh, r)) \
)
#else				/* __mips__ */
#define R_REG(osh, r) (\
	SELECT_BUS_READ(osh, \
	SELECT_BUS_READ( \
		({ \
			__typeof(*(r)) __osl_v; \
			__asm__ __volatile__("sync"); \
@@ -126,7 +123,7 @@ extern uint osl_pci_slot(struct osl_info *osh);
#endif				/* __mips__ */

#define W_REG(osh, r, v) do { \
	SELECT_BUS_WRITE(osh,  \
	SELECT_BUS_WRITE( \
		switch (sizeof(*(r))) { \
		case sizeof(u8): \
			writeb((u8)(v), (volatile u8*)(r)); break; \
@@ -139,7 +136,7 @@ extern uint osl_pci_slot(struct osl_info *osh);
	} while (0)
#else				/* IL_BIGENDIAN */
#define R_REG(osh, r) (\
	SELECT_BUS_READ(osh, \
	SELECT_BUS_READ( \
		({ \
			__typeof(*(r)) __osl_v; \
			switch (sizeof(*(r))) { \
@@ -160,7 +157,7 @@ extern uint osl_pci_slot(struct osl_info *osh);
		OSL_READ_REG(osh, r)) \
)
#define W_REG(osh, r, v) do { \
	SELECT_BUS_WRITE(osh,  \
	SELECT_BUS_WRITE( \
		switch (sizeof(*(r))) { \
		case sizeof(u8):	\
			writeb((u8)(v), \
+2 −2
Original line number Diff line number Diff line
@@ -212,9 +212,9 @@ typedef struct gpioh_item {

/* misc si info needed by some of the routines */
typedef struct si_info {
	struct si_pub pub;	/* back plane public state (must be first field) */
	struct si_pub pub;	/* back plane public state (must be first) */
	struct osl_info *osh;		/* osl os handle */
	void *sdh;		/* bcmsdh handle */
	void *pbus;		/* handle to bus (pci/sdio/..) */
	uint dev_coreid;	/* the core provides driver functions */
	void *intr_arg;		/* interrupt callback function arg */
	si_intrsoff_t intrsoff_fn;	/* turns chip interrupts off */
+3 −3
Original line number Diff line number Diff line
@@ -127,7 +127,7 @@ void ai_scan(si_t *sih, void *regs, uint devid)
		sii->curwrap = (void *)((unsigned long)regs + SI_CORE_SIZE);

		/* Now point the window at the erom */
		pci_write_config_dword(sii->osh->pdev, PCI_BAR0_WIN, erombase);
		pci_write_config_dword(sii->pbus, PCI_BAR0_WIN, erombase);
		eromptr = regs;
		break;

@@ -347,10 +347,10 @@ void *ai_setcoreidx(si_t *sih, uint coreidx)

	case PCI_BUS:
		/* point bar0 window */
		pci_write_config_dword(sii->osh->pdev, PCI_BAR0_WIN, addr);
		pci_write_config_dword(sii->pbus, PCI_BAR0_WIN, addr);
		regs = sii->curmap;
		/* point bar0 2nd 4KB window */
		pci_write_config_dword(sii->osh->pdev, PCI_BAR0_WIN2, wrap);
		pci_write_config_dword(sii->pbus, PCI_BAR0_WIN2, wrap);
		break;

	case SPI_BUS:
Loading